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📄 receive.rpt

📁 结合XILINXCPLD所做的模拟RS232通信verilog源程序
💻 RPT
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1234 
	count_reg_0.FBK.LFBK * /bit_collect_1.FBK.LFBK * count_reg_1.FBK.LFBK * 
	/bit_collect_0.FBK.LFBK * rxd_start_reg.FBK.LFBK * /N109.FBK.LFBK
    "sbuf<1>".CLKF  =  clock_pluse
    "sbuf<1>".PRLD  =  VCC    

 "sbuf<2>".T  =  rxd * count_reg_2 * /count_reg_3 * 
	bit_cnt_0.FBK.LFBK * bit_cnt_1.FBK.LFBK * /bit_cnt_2.FBK.LFBK * 
	/bit_cnt_3.FBK.LFBK * count_reg_0.FBK.LFBK * bit_collect_1.FBK.LFBK * 
	count_reg_1.FBK.LFBK * rxd_start_reg.FBK.LFBK * N112.FBK.LFBK
	+ rxd * count_reg_2 * /count_reg_3 * 
	bit_cnt_0.FBK.LFBK * bit_cnt_1.FBK.LFBK * /bit_cnt_2.FBK.LFBK * 
	/bit_cnt_3.FBK.LFBK * count_reg_0.FBK.LFBK * count_reg_1.FBK.LFBK * 
	bit_collect_0.FBK.LFBK * rxd_start_reg.FBK.LFBK * N112.FBK.LFBK
	+ /rxd * count_reg_2 * /count_reg_3 * 
	bit_cnt_0.FBK.LFBK * bit_cnt_1.FBK.LFBK * /bit_cnt_2.FBK.LFBK * 
	/bit_cnt_3.FBK.LFBK * count_reg_0.FBK.LFBK * /bit_collect_1.FBK.LFBK * 
	count_reg_1.FBK.LFBK * rxd_start_reg.FBK.LFBK * /N112.FBK.LFBK
	+ count_reg_2 * /count_reg_3 * bit_cnt_0.FBK.LFBK * 
	bit_cnt_1.FBK.LFBK * /bit_cnt_2.FBK.LFBK * /bit_cnt_3.FBK.LFBK * 
	count_reg_0.FBK.LFBK * bit_collect_1.FBK.LFBK * count_reg_1.FBK.LFBK * 
	bit_collect_0.FBK.LFBK * rxd_start_reg.FBK.LFBK * N112.FBK.LFBK
;Imported pterms FB5_7
	+ /rxd * count_reg_2 * /count_reg_3 * 
	bit_cnt_0.FBK.LFBK * bit_cnt_1.FBK.LFBK * /bit_cnt_2.FBK.LFBK * 
	/bit_cnt_3.FBK.LFBK * count_reg_0.FBK.LFBK * count_reg_1.FBK.LFBK * 
	/bit_collect_0.FBK.LFBK * rxd_start_reg.FBK.LFBK * /N112.FBK.LFBK
	+ count_reg_2 * /count_reg_3 * bit_cnt_0.FBK.LFBK * 
	bit_cnt_1.FBK.LFBK * /bit_cnt_2.FBK.LFBK * /bit_cnt_3.FBK.LFBK * 
	count_reg_0.FBK.LFBK * /bit_collect_1.FBK.LFBK * count_reg_1.FBK.LFBK * 
	/bit_collect_0.FBK.LFBK * rxd_start_reg.FBK.LFBK * /N112.FBK.LFBK
    "sbuf<2>".CLKF  =  clock_pluse
    "sbuf<2>".PRLD  =  VCC    

 "sbuf<3>".T  =  rxd * count_reg_2 * /count_reg_3 * 
	/bit_cnt_0.FBK.LFBK * /bit_cnt_1.FBK.LFBK * bit_cnt_2.FBK.LFBK * 
	/bit_cnt_3.FBK.LFBK * count_reg_0.FBK.LFBK * bit_collect_1.FBK.LFBK * 
	count_reg_1.FBK.LFBK * rxd_start_reg.FBK.LFBK * N115.FBK.LFBK
	+ rxd * count_reg_2 * /count_reg_3 * 
	/bit_cnt_0.FBK.LFBK * /bit_cnt_1.FBK.LFBK * bit_cnt_2.FBK.LFBK * 
	/bit_cnt_3.FBK.LFBK * count_reg_0.FBK.LFBK * count_reg_1.FBK.LFBK * 
	bit_collect_0.FBK.LFBK * rxd_start_reg.FBK.LFBK * N115.FBK.LFBK
	+ /rxd * count_reg_2 * /count_reg_3 * 
	/bit_cnt_0.FBK.LFBK * /bit_cnt_1.FBK.LFBK * bit_cnt_2.FBK.LFBK * 
	/bit_cnt_3.FBK.LFBK * count_reg_0.FBK.LFBK * /bit_collect_1.FBK.LFBK * 
	count_reg_1.FBK.LFBK * rxd_start_reg.FBK.LFBK * /N115.FBK.LFBK
	+ count_reg_2 * /count_reg_3 * /bit_cnt_0.FBK.LFBK * 
	/bit_cnt_1.FBK.LFBK * bit_cnt_2.FBK.LFBK * /bit_cnt_3.FBK.LFBK * 
	count_reg_0.FBK.LFBK * bit_collect_1.FBK.LFBK * count_reg_1.FBK.LFBK * 
	bit_collect_0.FBK.LFBK * rxd_start_reg.FBK.LFBK * N115.FBK.LFBK
;Imported pterms FB5_5
	+ /rxd * count_reg_2 * /count_reg_3 * 
	/bit_cnt_0.FBK.LFBK * /bit_cnt_1.FBK.LFBK * bit_cnt_2.FBK.LFBK * 
	/bit_cnt_3.FBK.LFBK * count_reg_0.FBK.LFBK * count_reg_1.FBK.LFBK * 
	/bit_collect_0.FBK.LFBK * rxd_start_reg.FBK.LFBK * /N115.FBK.LFBK
	+ count_reg_2 * /count_reg_3 * /bit_cnt_0.FBK.LFBK * 
	/bit_cnt_1.FBK.LFBK * bit_cnt_2.FBK.LFBK * /bit_cnt_3.FBK.LFBK * 
	count_reg_0.FBK.LFBK * /bit_collect_1.FBK.LFBK * count_reg_1.FBK.LFBK * 
	/bit_collect_0.FBK.LFBK * rxd_start_reg.FBK.LFBK * /N115.FBK.LFBK
    "sbuf<3>".CLKF  =  clock_pluse
    "sbuf<3>".PRLD  =  VCC    

 "sbuf<4>".T  =  rxd * count_reg_2 * /count_reg_3 * 
	bit_cnt_0.FBK.LFBK * /bit_cnt_1.FBK.LFBK * bit_cnt_2.FBK.LFBK * 
	/bit_cnt_3.FBK.LFBK * count_reg_0.FBK.LFBK * bit_collect_1.FBK.LFBK * 
	count_reg_1.FBK.LFBK * rxd_start_reg.FBK.LFBK * N118.FBK.LFBK
	+ count_reg_2 * /count_reg_3 * bit_cnt_0.FBK.LFBK * 
	/bit_cnt_1.FBK.LFBK * bit_cnt_2.FBK.LFBK * /bit_cnt_3.FBK.LFBK * 
	count_reg_0.FBK.LFBK * bit_collect_1.FBK.LFBK * count_reg_1.FBK.LFBK * 
	bit_collect_0.FBK.LFBK * rxd_start_reg.FBK.LFBK * N118.FBK.LFBK
;Imported pterms FB5_4
	+ rxd * count_reg_2 * /count_reg_3 * 
	bit_cnt_0.FBK.LFBK * /bit_cnt_1.FBK.LFBK * bit_cnt_2.FBK.LFBK * 
	/bit_cnt_3.FBK.LFBK * count_reg_0.FBK.LFBK * count_reg_1.FBK.LFBK * 
	bit_collect_0.FBK.LFBK * rxd_start_reg.FBK.LFBK * N118.FBK.LFBK
	+ /rxd * count_reg_2 * /count_reg_3 * 
	bit_cnt_0.FBK.LFBK * /bit_cnt_1.FBK.LFBK * bit_cnt_2.FBK.LFBK * 
	/bit_cnt_3.FBK.LFBK * count_reg_0.FBK.LFBK * /bit_collect_1.FBK.LFBK * 
	count_reg_1.FBK.LFBK * rxd_start_reg.FBK.LFBK * /N118.FBK.LFBK
	+ /rxd * count_reg_2 * /count_reg_3 * 
	bit_cnt_0.FBK.LFBK * /bit_cnt_1.FBK.LFBK * bit_cnt_2.FBK.LFBK * 
	/bit_cnt_3.FBK.LFBK * count_reg_0.FBK.LFBK * count_reg_1.FBK.LFBK * 
	/bit_collect_0.FBK.LFBK * rxd_start_reg.FBK.LFBK * /N118.FBK.LFBK
	+ count_reg_2 * /count_reg_3 * bit_cnt_0.FBK.LFBK * 
	/bit_cnt_1.FBK.LFBK * bit_cnt_2.FBK.LFBK * /bit_cnt_3.FBK.LFBK * 
	count_reg_0.FBK.LFBK * /bit_collect_1.FBK.LFBK * count_reg_1.FBK.LFBK * 
	/bit_collect_0.FBK.LFBK * rxd_start_reg.FBK.LFBK * /N118.FBK.LFBK
    "sbuf<4>".CLKF  =  clock_pluse
    "sbuf<4>".PRLD  =  VCC    

 "sbuf<5>".T  =  rxd * count_reg_2 * /count_reg_3 * 
	/bit_cnt_0.FBK.LFBK * bit_cnt_1.FBK.LFBK * bit_cnt_2.FBK.LFBK * 
	/bit_cnt_3.FBK.LFBK * count_reg_0.FBK.LFBK * bit_collect_1.FBK.LFBK * 
	count_reg_1.FBK.LFBK * rxd_start_reg.FBK.LFBK * N121.FBK.LFBK
	+ rxd * count_reg_2 * /count_reg_3 * 
	/bit_cnt_0.FBK.LFBK * bit_cnt_1.FBK.LFBK * bit_cnt_2.FBK.LFBK * 
	/bit_cnt_3.FBK.LFBK * count_reg_0.FBK.LFBK * count_reg_1.FBK.LFBK * 
	bit_collect_0.FBK.LFBK * rxd_start_reg.FBK.LFBK * N121.FBK.LFBK
	+ /rxd * count_reg_2 * /count_reg_3 * 
	/bit_cnt_0.FBK.LFBK * bit_cnt_1.FBK.LFBK * bit_cnt_2.FBK.LFBK * 
	/bit_cnt_3.FBK.LFBK * count_reg_0.FBK.LFBK * /bit_collect_1.FBK.LFBK * 
	count_reg_1.FBK.LFBK * rxd_start_reg.FBK.LFBK * /N121.FBK.LFBK
	+ count_reg_2 * /count_reg_3 * /bit_cnt_0.FBK.LFBK * 
	bit_cnt_1.FBK.LFBK * bit_cnt_2.FBK.LFBK * /bit_cnt_3.FBK.LFBK * 
	count_reg_0.FBK.LFBK * bit_collect_1.FBK.LFBK * count_reg_1.FBK.LFBK * 
	bit_collect_0.FBK.LFBK * rxd_start_reg.FBK.LFBK * N121.FBK.LFBK
;Imported pterms FB5_2
	+ /rxd * count_reg_2 * /count_reg_3 * 
	/bit_cnt_0.FBK.LFBK * bit_cnt_1.FBK.LFBK * bit_cnt_2.FBK.LFBK * 
	/bit_cnt_3.FBK.LFBK * count_reg_0.FBK.LFBK * count_reg_1.FBK.LFBK * 
	/bit_collect_0.FBK.LFBK * rxd_start_reg.FBK.LFBK * /N121.FBK.LFBK
	+ count_reg_2 * /count_reg_3 * /bit_cnt_0.FBK.LFBK * 
	bit_cnt_1.FBK.LFBK * bit_cnt_2.FBK.LFBK * /bit_cnt_3.FBK.LFBK * 
	count_reg_0.FBK.LFBK * /bit_collect_1.FBK.LFBK * count_reg_1.FBK.LFBK * 
	/bit_collect_0.FBK.LFBK * rxd_start_reg.FBK.LFBK * /N121.FBK.LFBK
    "sbuf<5>".CLKF  =  clock_pluse
    "sbuf<5>".PRLD  =  VCC    

 "sbuf<6>".T  =  rxd * count_reg_2 * /count_reg_3 * 
	bit_cnt_0.FBK.LFBK * bit_cnt_1.FBK.LFBK * bit_cnt_2.FBK.LFBK * 
	/bit_cnt_3.FBK.LFBK * count_reg_0.FBK.LFBK * bit_collect_1.FBK.LFBK * 
	count_reg_1.FBK.LFBK * rxd_start_reg.FBK.LFBK * N124.FBK.LFBK
	+ count_reg_2 * /count_reg_3 * bit_cnt_0.FBK.LFBK * 
	bit_cnt_1.FBK.LFBK * bit_cnt_2.FBK.LFBK * /bit_cnt_3.FBK.LFBK * 
	count_reg_0.FBK.LFBK * bit_collect_1.FBK.LFBK * count_reg_1.FBK.LFBK * 
	bit_collect_0.FBK.LFBK * rxd_start_reg.FBK.LFBK * N124.FBK.LFBK
;Imported pterms FB5_1
	+ rxd * count_reg_2 * /count_reg_3 * 
	bit_cnt_0.FBK.LFBK * bit_cnt_1.FBK.LFBK * bit_cnt_2.FBK.LFBK * 
	/bit_cnt_3.FBK.LFBK * count_reg_0.FBK.LFBK * count_reg_1.FBK.LFBK * 
	bit_collect_0.FBK.LFBK * rxd_start_reg.FBK.LFBK * N124.FBK.LFBK
	+ /rxd * count_reg_2 * /count_reg_3 * 
	bit_cnt_0.FBK.LFBK * bit_cnt_1.FBK.LFBK * bit_cnt_2.FBK.LFBK * 
	/bit_cnt_3.FBK.LFBK * count_reg_0.FBK.LFBK * /bit_collect_1.FBK.LFBK * 
	count_reg_1.FBK.LFBK * rxd_start_reg.FBK.LFBK * /N124.FBK.LFBK
	+ /rxd * count_reg_2 * /count_reg_3 * 
	bit_cnt_0.FBK.LFBK * bit_cnt_1.FBK.LFBK * bit_cnt_2.FBK.LFBK * 
	/bit_cnt_3.FBK.LFBK * count_reg_0.FBK.LFBK * count_reg_1.FBK.LFBK * 
	/bit_collect_0.FBK.LFBK * rxd_start_reg.FBK.LFBK * /N124.FBK.LFBK
	+ count_reg_2 * /count_reg_3 * bit_cnt_0.FBK.LFBK * 
	bit_cnt_1.FBK.LFBK * bit_cnt_2.FBK.LFBK * /bit_cnt_3.FBK.LFBK * 
	count_reg_0.FBK.LFBK * /bit_collect_1.FBK.LFBK * count_reg_1.FBK.LFBK * 
	/bit_collect_0.FBK.LFBK * rxd_start_reg.FBK.LFBK * /N124.FBK.LFBK
    "sbuf<6>".CLKF  =  clock_pluse
    "sbuf<6>".PRLD  =  VCC    

 "sbuf<7>".T  =  rxd * rxd_start_reg * /bit_cnt_0 * /bit_cnt_1 * 
	/bit_cnt_2 * bit_cnt_3 * count_reg_0 * bit_collect_0 * 
	count_reg_1 * count_reg_2.FBK.LFBK * /count_reg_3.FBK.LFBK * 
	N127.FBK.LFBK
	+ rxd * rxd_start_reg * /bit_cnt_0 * /bit_cnt_1 * 
	/bit_cnt_2 * bit_cnt_3 * count_reg_0 * bit_collect_1 * 
	count_reg_1 * count_reg_2.FBK.LFBK * /count_reg_3.FBK.LFBK * 
	N127.FBK.LFBK
	+ /rxd * rxd_start_reg * /bit_cnt_0 * /bit_cnt_1 * 
	/bit_cnt_2 * bit_cnt_3 * count_reg_0 * /bit_collect_1 * 
	count_reg_1 * count_reg_2.FBK.LFBK * /count_reg_3.FBK.LFBK * 
	/N127.FBK.LFBK
	+ rxd_start_reg * /bit_cnt_0 * /bit_cnt_1 * 
	/bit_cnt_2 * bit_cnt_3 * count_reg_0 * bit_collect_0 * 
	bit_collect_1 * count_reg_1 * count_reg_2.FBK.LFBK * 
	/count_reg_3.FBK.LFBK * N127.FBK.LFBK
;Imported pterms FB3_16
	+ rxd_start_reg * /bit_cnt_0 * /bit_cnt_1 * 
	/bit_cnt_2 * bit_cnt_3 * count_reg_0 * /bit_collect_0 * 
	/bit_collect_1 * count_reg_1 * count_reg_2.FBK.LFBK * 
	/count_reg_3.FBK.LFBK * /N127.FBK.LFBK
;Imported pterms FB3_18
	+ /rxd * rxd_start_reg * /bit_cnt_0 * /bit_cnt_1 * 
	/bit_cnt_2 * bit_cnt_3 * count_reg_0 * /bit_collect_0 * 
	count_reg_1 * count_reg_2.FBK.LFBK * /count_reg_3.FBK.LFBK * 
	/N127.FBK.LFBK
    "sbuf<7>".CLKF  =  clock_pluse.FBK.LFBK
    "sbuf<7>".PRLD  =  VCC    

 bit_cnt_0.T  =  /rxd * bit_cnt_0.FBK.LFBK * 
	/rxd_start_reg.FBK.LFBK
	+ count_reg_2 * /count_reg_3 * count_reg_0.FBK.LFBK * 
	count_reg_1.FBK.LFBK * rxd_start_reg.FBK.LFBK
    bit_cnt_0.CLKF  =  clock_pluse
    bit_cnt_0.PRLD  =  GND    

 bit_cnt_1.T  =  /rxd * bit_cnt_1.FBK.LFBK * 
	/rxd_start_reg.FBK.LFBK
	+ count_reg_2 * /count_reg_3 * bit_cnt_0.FBK.LFBK * 
	count_reg_0.FBK.LFBK * count_reg_1.FBK.LFBK * rxd_start_reg.FBK.LFBK
    bit_cnt_1.CLKF  =  clock_pluse
    bit_cnt_1.PRLD  =  GND    

 bit_cnt_2.T  =  /rxd * bit_cnt_2.FBK.LFBK * 
	/rxd_start_reg.FBK.LFBK
	+ count_reg_2 * /count_reg_3 * bit_cnt_0.FBK.LFBK * 
	bit_cnt_1.FBK.LFBK * count_reg_0.FBK.LFBK * count_reg_1.FBK.LFBK * 
	rxd_start_reg.FBK.LFBK
    bit_cnt_2.CLKF  =  clock_pluse
    bit_cnt_2.PRLD  =  GND    

 bit_cnt_3.T  =  /rxd * bit_cnt_3.FBK.LFBK * 
	/rxd_start_reg.FBK.LFBK
	+ count_reg_2 * /count_reg_3 * bit_cnt_0.FBK.LFBK * 
	bit_cnt_1.FBK.LFBK * bit_cnt_2.FBK.LFBK * count_reg_0.FBK.LFBK * 
	count_reg_1.FBK.LFBK * rxd_start_reg.FBK.LFBK
    bit_cnt_3.CLKF  =  clock_pluse
    bit_cnt_3.PRLD  =  GND    

 bit_collect_0.T  =  rxd * count_reg_2 * /count_reg_3 * 
	count_reg_0.FBK.LFBK * /count_reg_1.FBK.LFBK * /bit_collect_0.FBK.LFBK * 
	rxd_start_reg.FBK.LFBK
	+ /rxd * count_reg_2 * /count_reg_3 * 
	count_reg_0.FBK.LFBK * /count_reg_1.FBK.LFBK * bit_collect_0.FBK.LFBK * 
	rxd_start_reg.FBK.LFBK
    bit_collect_0.CLKF  =  clock_pluse
    bit_collect_0.PRLD  =  GND    

 bit_collect_1.T  =  ;Imported pterms FB5_18
	  rxd * count_reg_2 * /count_reg_3 * 
	/count_reg_0.FBK.LFBK * /bit_collect_1.FBK.LFBK * count_reg_1.FBK.LFBK * 
	rxd_start_reg.FBK.LFBK
	+ /rxd * count_reg_2 * /count_reg_3 * 
	/count_reg_0.FBK.LFBK * bit_collect_1.FBK.LFBK * count_reg_1.FBK.LFBK * 
	rxd_start_reg.FBK.LFBK
1234

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