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📄 send.mfd

📁 结合XILINXCPLD所做的模拟RS232通信verilog源程序
💻 MFD
📖 第 1 页 / 共 3 页
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123 
	+ count_2 * /count_7.FBK.LFBK * /count_8.FBK.LFBK * 
	/count_9.FBK.LFBK * count_0.FBK.LFBK * count_1.FBK.LFBK
    count_3.CLKF  =  clock	;FCLK/GCK
    count_3.PRLD  =  GND
GLOBALS | 1 | 2 | clock

MACROCELL | 1 | 16 | count_4
ATTRIBUTES | 4424448 | 0
OUTPUTMC | 7 | 1 | 7 | 1 | 12 | 1 | 6 | 1 | 5 | 1 | 16 | 1 | 15 | 1 | 14
INPUTS | 9 | count_9.FBK.LFBK  | count_4.FBK.LFBK  | count_7.FBK.LFBK  | count_8.FBK.LFBK  | count_0.FBK.LFBK  | count_1.FBK.LFBK  | count_3.FBK.LFBK  | count_2  | count_10.FBK.LFBK
INPUTMC | 9 | 1 | 5 | 1 | 16 | 1 | 12 | 1 | 6 | 1 | 8 | 1 | 13 | 1 | 17 | 0 | 12 | 1 | 7
EQ | 13 | 
    count_4.T  =  count_10.FBK.LFBK * count_7.FBK.LFBK * 
	count_4.FBK.LFBK
	+ count_10.FBK.LFBK * count_8.FBK.LFBK * 
	count_4.FBK.LFBK
	+ count_10.FBK.LFBK * count_9.FBK.LFBK * 
	count_4.FBK.LFBK
	+ count_2 * /count_10.FBK.LFBK * count_0.FBK.LFBK * 
	count_1.FBK.LFBK * count_3.FBK.LFBK
	+ count_2 * /count_7.FBK.LFBK * /count_8.FBK.LFBK * 
	/count_9.FBK.LFBK * count_0.FBK.LFBK * count_1.FBK.LFBK * 
	count_3.FBK.LFBK
    count_4.CLKF  =  clock	;FCLK/GCK
    count_4.PRLD  =  GND
GLOBALS | 1 | 2 | clock

MACROCELL | 1 | 15 | count_5
ATTRIBUTES | 4424448 | 0
OUTPUTMC | 6 | 1 | 7 | 1 | 12 | 1 | 6 | 1 | 5 | 1 | 15 | 1 | 14
INPUTS | 10 | count_9.FBK.LFBK  | count_5.FBK.LFBK  | count_7.FBK.LFBK  | count_8.FBK.LFBK  | count_0.FBK.LFBK  | count_1.FBK.LFBK  | count_3.FBK.LFBK  | count_2  | count_4.FBK.LFBK  | count_10.FBK.LFBK
INPUTMC | 10 | 1 | 5 | 1 | 15 | 1 | 12 | 1 | 6 | 1 | 8 | 1 | 13 | 1 | 17 | 0 | 12 | 1 | 16 | 1 | 7
EQ | 13 | 
    count_5.T  =  count_10.FBK.LFBK * count_7.FBK.LFBK * 
	count_5.FBK.LFBK
	+ count_10.FBK.LFBK * count_8.FBK.LFBK * 
	count_5.FBK.LFBK
	+ count_10.FBK.LFBK * count_9.FBK.LFBK * 
	count_5.FBK.LFBK
	+ count_2 * /count_10.FBK.LFBK * count_0.FBK.LFBK * 
	count_1.FBK.LFBK * count_3.FBK.LFBK * count_4.FBK.LFBK
	+ count_2 * /count_7.FBK.LFBK * /count_8.FBK.LFBK * 
	/count_9.FBK.LFBK * count_0.FBK.LFBK * count_1.FBK.LFBK * 
	count_3.FBK.LFBK * count_4.FBK.LFBK
    count_5.CLKF  =  clock	;FCLK/GCK
    count_5.PRLD  =  GND
GLOBALS | 1 | 2 | clock

MACROCELL | 1 | 14 | count_6
ATTRIBUTES | 4424448 | 0
OUTPUTMC | 5 | 1 | 7 | 1 | 12 | 1 | 6 | 1 | 5 | 1 | 14
INPUTS | 11 | count_9.FBK.LFBK  | count_6.FBK.LFBK  | count_7.FBK.LFBK  | count_8.FBK.LFBK  | count_0.FBK.LFBK  | count_1.FBK.LFBK  | count_3.FBK.LFBK  | count_2  | count_4.FBK.LFBK  | count_5.FBK.LFBK  | count_10.FBK.LFBK
INPUTMC | 11 | 1 | 5 | 1 | 14 | 1 | 12 | 1 | 6 | 1 | 8 | 1 | 13 | 1 | 17 | 0 | 12 | 1 | 16 | 1 | 15 | 1 | 7
EQ | 14 | 
    count_6.T  =  count_10.FBK.LFBK * count_7.FBK.LFBK * 
	count_6.FBK.LFBK
	+ count_10.FBK.LFBK * count_8.FBK.LFBK * 
	count_6.FBK.LFBK
	+ count_10.FBK.LFBK * count_9.FBK.LFBK * 
	count_6.FBK.LFBK
	+ count_2 * /count_10.FBK.LFBK * count_0.FBK.LFBK * 
	count_1.FBK.LFBK * count_3.FBK.LFBK * count_4.FBK.LFBK * 
	count_5.FBK.LFBK
	+ count_2 * /count_7.FBK.LFBK * /count_8.FBK.LFBK * 
	/count_9.FBK.LFBK * count_0.FBK.LFBK * count_1.FBK.LFBK * 
	count_3.FBK.LFBK * count_4.FBK.LFBK * count_5.FBK.LFBK
    count_6.CLKF  =  clock	;FCLK/GCK
    count_6.PRLD  =  GND
GLOBALS | 1 | 2 | clock

MACROCELL | 1 | 11 | uart_buf_0
ATTRIBUTES | 8520624 | 0
OUTPUTMC | 1 | 0 | 2
INPUTS | 2 | uart_buf_0/uart_buf_0_SETF  | uart_buf_5/uart_buf_5_RSTF
INPUTMC | 2 | 0 | 7 | 0 | 17
EQ | 6 | 
    uart_buf_0  :=  Gnd
    uart_buf_0.CLKF  =  Gnd
    uart_buf_0.SETF  =  "uart_buf_0/uart_buf_0_SETF"
    uart_buf_0.RSTF  =  /"uart_buf_0/uart_buf_0_SETF" * 
	"uart_buf_5/uart_buf_5_RSTF"
    uart_buf_0.PRLD  =  GND

MACROCELL | 1 | 10 | uart_buf_1
ATTRIBUTES | 8520624 | 0
OUTPUTMC | 1 | 0 | 2
INPUTS | 2 | uart_buf_1/uart_buf_1_SETF  | uart_buf_1/uart_buf_1_RSTF
INPUTMC | 2 | 0 | 5 | 0 | 6
EQ | 5 | 
    uart_buf_1  :=  Gnd
    uart_buf_1.CLKF  =  Gnd
    uart_buf_1.SETF  =  "uart_buf_1/uart_buf_1_SETF"
    uart_buf_1.RSTF  =  "uart_buf_1/uart_buf_1_RSTF"
    uart_buf_1.PRLD  =  GND

MACROCELL | 0 | 4 | uart_buf_2
ATTRIBUTES | 8586160 | 0
OUTPUTMC | 1 | 0 | 1
INPUTS | 10 | key_send<0>  | key_send<1>  | key_send<2>  | key_send<7>  | $OpTx$FX_DC$21.FBK".LFBK  | key_send<3>  | key_send<4>  | key_send<5>  | key_send<6>  | $OpTx$FX_DC$22.FBK".LFBK
INPUTMC | 2 | 0 | 11 | 0 | 10
INPUTP | 8 | 104 | 106 | 107 | 118 | 112 | 113 | 116 | 117
EQ | 7 | 
    uart_buf_2  :=  Gnd
    uart_buf_2.CLKF  =  Gnd
    uart_buf_2.SETF  =  "key_send<0>" * "key_send<1>" * "key_send<2>" * 
	"key_send<7>" * "$OpTx$FX_DC$22.FBK".LFBK
    uart_buf_2.RSTF  =  "key_send<3>" * "key_send<4>" * "key_send<5>" * 
	"key_send<6>" * "$OpTx$FX_DC$21.FBK".LFBK
    uart_buf_2.PRLD  =  GND

MACROCELL | 0 | 3 | uart_buf_3
ATTRIBUTES | 8586160 | 0
OUTPUTMC | 2 | 0 | 2 | 0 | 1
INPUTS | 10 | key_send<0>  | key_send<1>  | key_send<2>  | key_send<3>  | key_send<4>  | key_send<5>  | key_send<6>  | key_send<7>  | bitcnt_reg_3.FBK.LFBK  | uart_buf_3/uart_buf_3_RSTF.FBK".LFBK
INPUTMC | 2 | 0 | 8 | 0 | 14
INPUTP | 8 | 104 | 106 | 107 | 112 | 113 | 116 | 117 | 118
EXPORTS | 1 | 0 | 2
EQ | 10 | 
    uart_buf_3  :=  Gnd
    uart_buf_3.CLKF  =  Gnd
    uart_buf_3.SETF  =  "key_send<0>" * "key_send<1>" * "key_send<2>" * 
	"key_send<3>" * "key_send<4>" * "key_send<5>" * "key_send<6>" * 
	/"key_send<7>"
    uart_buf_3.RSTF  =  "uart_buf_3/uart_buf_3_RSTF.FBK".LFBK
    uart_buf_3.PRLD  =  GND
    uart_buf_3.EXP  =  "key_send<0>" * "key_send<1>" * "key_send<2>" * 
	"key_send<3>" * "key_send<4>" * "key_send<5>" * "key_send<6>" * 
	"key_send<7>" * bitcnt_reg_3.FBK.LFBK

MACROCELL | 1 | 2 | uart_buf_6
ATTRIBUTES | 8520608 | 0
OUTPUTMC | 1 | 0 | 2
INPUTS | 1 | uart_buf_7/uart_buf_7_RSTF
INPUTMC | 1 | 0 | 16
EQ | 4 | 
    uart_buf_6  :=  Gnd
    uart_buf_6.CLKF  =  Gnd
    uart_buf_6.SETF  =  "uart_buf_7/uart_buf_7_RSTF"
    uart_buf_6.PRLD  =  GND

MACROCELL | 0 | 2 | txd_reg
ATTRIBUTES | 8782626 | 0
INPUTS | 10 | bitcnt_reg_2.FBK.LFBK  | bitcnt_reg_3.FBK.LFBK  | bitcnt_reg_0.FBK.LFBK  | uart_buf_0  | uart_buf_1  | uart_buf_6  | EXP0_.EXP  | uart_buf_3.EXP  | bitcnt_reg_1.FBK.LFBK  | bit_start
INPUTMC | 10 | 0 | 0 | 0 | 8 | 0 | 13 | 1 | 11 | 1 | 10 | 1 | 2 | 0 | 1 | 0 | 3 | 0 | 9 | 1 | 9
IMPORTS | 2 | 0 | 1 | 0 | 3
EQ | 25 | 
    txd  :=  /bitcnt_reg_1.FBK.LFBK * /bitcnt_reg_2.FBK.LFBK * 
	bitcnt_reg_3.FBK.LFBK
	+ uart_buf_0 * /bitcnt_reg_1.FBK.LFBK * 
	/bitcnt_reg_2.FBK.LFBK * /bitcnt_reg_0.FBK.LFBK
	+ uart_buf_1 * /bitcnt_reg_1.FBK.LFBK * 
	/bitcnt_reg_2.FBK.LFBK * bitcnt_reg_0.FBK.LFBK
	+ uart_buf_6 * bitcnt_reg_1.FBK.LFBK * 
	bitcnt_reg_2.FBK.LFBK * /bitcnt_reg_0.FBK.LFBK * /bitcnt_reg_3.FBK.LFBK
;Imported pterms FB1_2
	+ uart_buf_4 * /bitcnt_reg_1.FBK.LFBK * 
	bitcnt_reg_2.FBK.LFBK * /bitcnt_reg_0.FBK.LFBK * /bitcnt_reg_3.FBK.LFBK
	+ uart_buf_5 * /bitcnt_reg_1.FBK.LFBK * 
	bitcnt_reg_2.FBK.LFBK * bitcnt_reg_0.FBK.LFBK * /bitcnt_reg_3.FBK.LFBK
	+ uart_buf_7 * bitcnt_reg_1.FBK.LFBK * 
	bitcnt_reg_2.FBK.LFBK * bitcnt_reg_0.FBK.LFBK * /bitcnt_reg_3.FBK.LFBK
	+ bitcnt_reg_1.FBK.LFBK * /bitcnt_reg_2.FBK.LFBK * 
	bitcnt_reg_0.FBK.LFBK * /bitcnt_reg_3.FBK.LFBK * uart_buf_3.FBK.LFBK
	+ bitcnt_reg_1.FBK.LFBK * /bitcnt_reg_2.FBK.LFBK * 
	/bitcnt_reg_0.FBK.LFBK * /bitcnt_reg_3.FBK.LFBK * uart_buf_2.FBK.LFBK
;Imported pterms FB1_4
	+ "key_send<0>" * "key_send<1>" * "key_send<2>" * 
	"key_send<3>" * "key_send<4>" * "key_send<5>" * "key_send<6>" * 
	"key_send<7>" * bitcnt_reg_3.FBK.LFBK
    txd.CLKF  =  bit_start
    txd.PRLD  =  GND

MACROCELL | 1 | 4 | uart_buf_4
ATTRIBUTES | 8520496 | 0
OUTPUTMC | 1 | 0 | 1
INPUTS | 1 | uart_buf_7/uart_buf_7_RSTF
INPUTMC | 1 | 0 | 16
EQ | 4 | 
    uart_buf_4  :=  Gnd
    uart_buf_4.CLKF  =  Gnd
    uart_buf_4.RSTF  =  "uart_buf_7/uart_buf_7_RSTF"
    uart_buf_4.PRLD  =  GND

MACROCELL | 1 | 3 | uart_buf_5
ATTRIBUTES | 8520496 | 0
OUTPUTMC | 1 | 0 | 1
INPUTS | 1 | uart_buf_5/uart_buf_5_RSTF
INPUTMC | 1 | 0 | 17
EQ | 4 | 
    uart_buf_5  :=  Gnd
    uart_buf_5.CLKF  =  Gnd
    uart_buf_5.RSTF  =  "uart_buf_5/uart_buf_5_RSTF"
    uart_buf_5.PRLD  =  GND

MACROCELL | 2 | 17 | uart_buf_7
ATTRIBUTES | 8520496 | 0
OUTPUTMC | 1 | 0 | 1
INPUTS | 1 | uart_buf_7/uart_buf_7_RSTF
INPUTMC | 1 | 0 | 16
EQ | 4 | 
    uart_buf_7  :=  Gnd
    uart_buf_7.CLKF  =  Gnd
    uart_buf_7.RSTF  =  "uart_buf_7/uart_buf_7_RSTF"
    uart_buf_7.PRLD  =  GND

MACROCELL | 0 | 7 | uart_buf_0/uart_buf_0_SETF
ATTRIBUTES | 133888 | 0
OUTPUTMC | 1 | 1 | 11
INPUTS | 8 | key_send<0>  | key_send<1>  | key_send<2>  | key_send<3>  | key_send<4>  | key_send<5>  | key_send<6>  | key_send<7>
INPUTP | 8 | 104 | 106 | 107 | 112 | 113 | 116 | 117 | 118
EQ | 12 | 
    "uart_buf_0/uart_buf_0_SETF"  =  "key_send<0>" * "key_send<1>" * "key_send<2>" * 
	"key_send<3>" * "key_send<4>" * "key_send<5>" * /"key_send<6>" * 
	"key_send<7>"
	+ "key_send<0>" * "key_send<1>" * "key_send<2>" * 
	"key_send<3>" * /"key_send<4>" * "key_send<5>" * "key_send<6>" * 
	"key_send<7>"
	+ "key_send<0>" * "key_send<1>" * /"key_send<2>" * 
	"key_send<3>" * "key_send<4>" * "key_send<5>" * "key_send<6>" * 
	"key_send<7>"
	+ /"key_send<0>" * "key_send<1>" * "key_send<2>" * 
	"key_send<3>" * "key_send<4>" * "key_send<5>" * "key_send<6>" * 
	"key_send<7>"

MACROCELL | 0 | 17 | uart_buf_5/uart_buf_5_RSTF
ATTRIBUTES | 133888 | 0
OUTPUTMC | 2 | 1 | 11 | 1 | 3
INPUTS | 10 | key_send<0>  | key_send<1>  | key_send<2>  | key_send<3>  | key_send<4>  | key_send<5>  | key_send<6>  | key_send<7>  | bitcnt_reg_2.EXP  | uart_buf_7/uart_buf_7_RSTF.EXP
123

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