📄 vz_ver4.rpt
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XACT: version D.19 Xilinx Inc.
Fitter Report
Design Name: vz_ver4 Date: 12- 9-2002, 4:54PM
Device Used: XC9536XL-10-VQ44
Fitting Status: Successful
**************************** Resource Summary ****************************
Macrocells Product Terms Registers Pins Function Block
Used Used Used Used Inputs Used
20 /36 ( 55%) 73 /180 ( 40%) 16 /36 ( 44%) 13 /34 ( 38%) 28 /108 ( 25%)
PIN RESOURCES:
Signal Type Required Mapped | Pin Type Used Remaining
------------------------------------|---------------------------------------
Input : 8 8 | I/O : 10 18
Output : 5 5 | GCK/IO : 3 0
Bidirectional : 0 0 | GTS/IO : 0 2
GCK : 0 0 | GSR/IO : 0 1
GTS : 0 0 |
GSR : 0 0 |
---- ----
Total 13 13
MACROCELL RESOURCES:
Total Macrocells Available 36
Registered Macrocells 16
Non-registered Macrocell driving I/O 4
GLOBAL RESOURCES:
Global clock net(s) unused.
Global output enable net(s) unused.
Global set/reset net(s) unused.
POWER DATA:
There are 20 macrocells in high performance mode (MCHP).
There are 0 macrocells in low power mode (MCLP).
There are a total of 20 macrocells used (MC).
End of Resource Summary
***************Resources Used by Successfully Mapped Logic******************
** LOGIC **
Signal Total Signals Loc Pwr Slew Pin Pin Pin
Name Pt Used Mode Rate # Type Use
DON 1 1 FB2_4 STD FAST 37 I/O O
HPICE 1 4 FB2_10 STD FAST 29 I/O O
L1/TERM_CNT1 4 9 FB1_16 STD 16 I/O I
L1/TERM_CNT2 4 12 FB2_11 STD 28 I/O (b)
L1/lfsr_counter1/Q_OUT0 4 5 FB1_15 STD 14 I/O I
L1/lfsr_counter1/Q_OUT1 4 5 FB1_14 STD 13 I/O (b)
L1/lfsr_counter1/Q_OUT2 4 5 FB1_13 STD 12 I/O (b)
L1/lfsr_counter1/Q_OUT3 4 5 FB1_12 STD 8 I/O (b)
L1/lfsr_counter1/Q_OUT4 5 6 FB1_18 STD (b) (b)
L1/lfsr_counter2/Q_OUT0 4 5 FB2_8 STD 31 I/O (b)
L1/lfsr_counter2/Q_OUT1 4 5 FB2_7 STD 32 I/O (b)
L1/lfsr_counter2/Q_OUT2 4 5 FB2_6 STD 33 GSR/I/O (b)
L1/lfsr_counter2/Q_OUT3 4 5 FB2_5 STD 34 GTS/I/O (b)
L1/lfsr_counter2/Q_OUT4 4 5 FB2_3 STD 36 GTS/I/O (b)
L1/lfsr_counter2/Q_OUT5 4 5 FB2_2 STD 38 I/O I
L1/lfsr_counter2/Q_OUT6 4 5 FB2_1 STD 39 I/O (b)
L1/lfsr_counter2/Q_OUT7 8 8 FB2_13 STD 23 I/O I
NICCE 1 4 FB2_9 STD FAST 30 I/O O
RST_VZ 1 1 FB2_12 STD FAST 27 I/O O
SYNC 4 4 FB1_17 STD FAST 18 I/O O
** INPUTS **
Signal Loc Pin Pin Pin
Name # Type Use
A20 FB1_3 43 GCK/I/O I
A21 FB1_5 44 GCK/I/O I
A22 FB1_7 1 GCK/I/O I
CLK FB1_16 16 I/O I
CLK_RST FB1_15 14 I/O I
DISPLAY FB2_2 38 I/O I
EXTCE FB1_6 2 I/O I
RSTIN FB2_13 23 I/O I
End of Resources Used by Successfully Mapped Logic
*********************Function Block Resource Summary***********************
Function # of FB Inputs Signals Total O/IO IO
Block Macrocells Used Used Pt Used Req Avail
FB1 7 10 10 29 1/0 17
FB2 13 18 18 44 4/0 17
---- ----- ----- -----
20 73 5/0 34
*********************************** FB1 ***********************************
Number of function block inputs used/remaining: 10/44
Number of signals used by logic mapping into function block: 10
Signal Total Imp Exp Unused Loc Pwr Pin Pin Pin
Name Pt Pt Pt Pt Mode # Type Use
(unused) 0 0 0 5 FB1_1 40 I/O
(unused) 0 0 0 5 FB1_2 41 I/O
(unused) 0 0 0 5 FB1_3 43 GCK/I/O I
(unused) 0 0 0 5 FB1_4 42 I/O
(unused) 0 0 0 5 FB1_5 44 GCK/I/O I
(unused) 0 0 0 5 FB1_6 2 I/O I
(unused) 0 0 0 5 FB1_7 1 GCK/I/O I
(unused) 0 0 0 5 FB1_8 3 I/O
(unused) 0 0 0 5 FB1_9 5 I/O
(unused) 0 0 0 5 FB1_10 6 I/O
(unused) 0 0 0 5 FB1_11 7 I/O
L1/lfsr_counter1/Q_OUT3
4 0 0 1 FB1_12 STD 8 I/O (b)
L1/lfsr_counter1/Q_OUT2
4 0 0 1 FB1_13 STD 12 I/O (b)
L1/lfsr_counter1/Q_OUT1
4 0 0 1 FB1_14 STD 13 I/O (b)
L1/lfsr_counter1/Q_OUT0
4 0 0 1 FB1_15 STD 14 I/O I
L1/TERM_CNT1 4 0 0 1 FB1_16 STD 16 I/O I
SYNC 4 0 0 1 FB1_17 STD 18 I/O O
L1/lfsr_counter1/Q_OUT4
5 0 0 0 FB1_18 STD (b) (b)
Signals Used by Logic in Function Block
1: CLK 5: "L1/lfsr_counter1/Q_OUT0"
8: "L1/lfsr_counter1/Q_OUT3"
2: CLK_RST 6: "L1/lfsr_counter1/Q_OUT1"
9: "L1/lfsr_counter1/Q_OUT4"
3: "L1/TERM_CNT1" 7: "L1/lfsr_counter1/Q_OUT2"
10: SYNC
4: "L1/TERM_CNT2"
Signal 1 2 3 4 Signals FB
Name 0----+----0----+----0----+----0----+----0 Used Inputs
L1/lfsr_counter1/Q_OUT3
XXX.....XX.............................. 5 5
L1/lfsr_counter1/Q_OUT2
XXX....X.X.............................. 5 5
L1/lfsr_counter1/Q_OUT1
XXX...X..X.............................. 5 5
L1/lfsr_counter1/Q_OUT0
XXX..X...X.............................. 5 5
L1/TERM_CNT1 XXX.XXXXXX.............................. 9 9
SYNC XXXX.................................... 4 4
L1/lfsr_counter1/Q_OUT4
XXX.X..X.X.............................. 6 6
0----+----1----+----2----+----3----+----4
0 0 0 0
Legend:
Total Pt - Total product terms used by the macrocell signal
Imp Pt - Product terms imported from other macrocells
Exp Pt - Product terms exported to other macrocells
in direction shown
Unused Pt - Unused local product terms remaining in macrocell
Loc - Location where logic was mapped in device
Pwr Mode - Macrocell power mode
Pin Type/Use - I - Input GCK/FCLK - Global clock
O - Output GTS/FOE - Global 3state/output-enable
(b) - Buried macrocell
X(@) - Signal used as input (wire-AND input) to the macrocell logic.
The number of Signals Used may exceed the number of FB Inputs Used due
to wire-ANDing in the switch matrix.
*********************************** FB2 ***********************************
Number of function block inputs used/remaining: 18/36
Number of signals used by logic mapping into function block: 18
Signal Total Imp Exp Unused Loc Pwr Pin Pin Pin
Name Pt Pt Pt Pt Mode # Type Use
L1/lfsr_counter2/Q_OUT6
4 0 0 1 FB2_1 STD 39 I/O (b)
L1/lfsr_counter2/Q_OUT5
4 0 0 1 FB2_2 STD 38 I/O I
L1/lfsr_counter2/Q_OUT4
4 0 0 1 FB2_3 STD 36 GTS/I/O (b)
DON 1 0 0 4 FB2_4 STD 37 I/O O
L1/lfsr_counter2/Q_OUT3
4 0 0 1 FB2_5 STD 34 GTS/I/O (b)
L1/lfsr_counter2/Q_OUT2
4 0 0 1 FB2_6 STD 33 GSR/I/O (b)
L1/lfsr_counter2/Q_OUT1
4 0 0 1 FB2_7 STD 32 I/O (b)
L1/lfsr_counter2/Q_OUT0
4 0 0 1 FB2_8 STD 31 I/O (b)
NICCE 1 0 0 4 FB2_9 STD 30 I/O O
HPICE 1 0 0 4 FB2_10 STD 29 I/O O
L1/TERM_CNT2 4 0 0 1 FB2_11 STD 28 I/O (b)
RST_VZ 1 0 \/2 2 FB2_12 STD 27 I/O O
L1/lfsr_counter2/Q_OUT7
8 3<- 0 0 FB2_13 STD 23 I/O I
(unused) 0 0 /\1 4 FB2_14 22 I/O (b)
(unused) 0 0 0 5 FB2_15 21 I/O
(unused) 0 0 0 5 FB2_16 20 I/O
(unused) 0 0 0 5 FB2_17 19 I/O
(unused) 0 0 0 5 FB2_18 (b)
Signals Used by Logic in Function Block
1: A20 7: EXTCE 13: "L1/lfsr_counter2/Q_OUT4"
2: A21 8: "L1/TERM_CNT2" 14: "L1/lfsr_counter2/Q_OUT5"
3: A22 9: "L1/lfsr_counter2/Q_OUT0"
15: "L1/lfsr_counter2/Q_OUT6"
4: CLK 10: "L1/lfsr_counter2/Q_OUT1"
16: "L1/lfsr_counter2/Q_OUT7"
5: CLK_RST 11: "L1/lfsr_counter2/Q_OUT2"
17: RSTIN
6: DISPLAY 12: "L1/lfsr_counter2/Q_OUT3"
18: SYNC
Signal 1 2 3 4 Signals FB
Name 0----+----0----+----0----+----0----+----0 Used Inputs
L1/lfsr_counter2/Q_OUT6
...XX..X.......X.X...................... 5 5
L1/lfsr_counter2/Q_OUT5
...XX..X......X..X...................... 5 5
L1/lfsr_counter2/Q_OUT4
...XX..X.....X...X...................... 5 5
DON .....X.................................. 1 1
L1/lfsr_counter2/Q_OUT3
...XX..X....X....X...................... 5 5
L1/lfsr_counter2/Q_OUT2
...XX..X...X.....X...................... 5 5
L1/lfsr_counter2/Q_OUT1
...XX..X..X......X...................... 5 5
L1/lfsr_counter2/Q_OUT0
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