romlocore.s

用VHDL语言实现的ARM处理器的标准内核的源代码程序

	add r0,r1,r2,lsr r3      
	mov r3,#1
	add r0,r1,r2,lsr r3      
	mov r3,#32
	add r0,r1,r2,lsr r3      
	mov r3,#33
	add r0,r1,r2,lsr r3
	
	mov r2,#0x40000001
	mov r3,#1
	add r0,r1,r2,lsr r3  /* carry 0 */    
	mov r2,#0x40000001
	mov r3,#32
	add r0,r1,r2,lsr r3  /* carry 0 */

	/* adm_DAPRAMxLDSTAM_DAPRAM_sreg shiefter */
	/* adm_sasr:	
          --if Rs[7:0] == 0 then
          --  shifter_operand = Rm
          --  shifter_carry_out = C Flag
          --else if Rs[7:0] < 32 then
          --  shifter_operand = Rm Arithmetic_Shift_Right Rs[7:0]
          --  shifter_carry_out = Rm[Rs[7:0] - 1]
          --else  Rs[7:0] >= 32 
          --  if Rm[31] == 0 then
          --    shifter_operand = 0
          --    shifter_carry_out = Rm[31]
          --  else  Rm[31] == 1 
          --    shifter_operand = 0xFFFFFFFF
          --    shifter_carry_out = Rm[31]
	*/
	mov r2,#0xc0000001
	mov r3,#0
	add r0,r1,r2,asr r3      
	mov r3,#1
	add r0,r1,r2,asr r3      
	mov r2,#0xc0000001
	mov r3,#32
	add r0,r1,r2,asr r3      
	mov r2,#0x40000001
	mov r3,#32
	add r0,r1,r2,asr r3
	
	mov r2,#0x40000001
	mov r3,#1
	add r0,r1,r2,asr r3  /* carry 0 */    
	mov r2,#0x40000000   
	mov r3,#32
	add r0,r1,r2,asr r3  /* carry 0 */

	/* adm_DAPRAMxLDSTAM_DAPRAM_sreg shiefter */
	/* adm_sror:	
	  --if Rs[7:0] == 0 then
          --  shifter_operand = Rm
          --  shifter_carry_out = C Flag
          --else if Rs[4:0] == 0 then
          --  shifter_operand = Rm 
          --  shifter_carry_out = Rm[31]
          --else  Rs[4:0] > 0
          --  shifter_operand = Rm Rotate_Right Rs[4:0]
          --  shifter_carry_out = Rm[Rs[4:0] - 1]
	*/
	
	mov r2,#0x40000001
	mov r3,#0
	add r0,r1,r2,ror r3      
	mov r2,#0xc0000001
	mov r3,#0
	add r0,r1,r2,ror r3      
	mov r3,#1
	add r0,r1,r2,ror r3      
	mov r3,#32
	add r0,r1,r2,ror r3      
	mov r2,#0x40000001
	mov r3,#32
	add r0,r1,r2,ror r3      
	
	mov r3,#33
	add r0,r1,r2,ror r3
	
	/* adm_DAPRAMxLDSTAM_DAPRAM_sreg shiefter */
	/* adm_srrx:	
          --shifter_operand = (C Flag Logical_Shift_Left 31) OR (Rm Logical_Shift_Right 1)
          --shifter_carry_out = Rm[0]
	*/
	mov r2,#0xc0000001
	mov r3,#0
	add r0,r1,r2,rrx      

	/* adm_DAPRAMxLDSTAM_DAPRAMxLDSTAM_simm */
	/* adm_slsl
          --if shift_imm == 0 then 
          --  shifter_operand = Rm
          --  shifter_carry_out = C Flag
          --else  shift_imm > 0 
          --  shifter_operand = Rm Logical_Shift_Left shift_imm
          --  shifter_carry_out = Rm[32 - shift_imm]
	*/
	mov r2,#0xc0000001
	add r0,r1,r2,lsl #0      
	add r0,r1,r2,lsl #1      
	add r0,r1,r2,lsl #3      
	add r0,r1,r2,lsl #31      

	/* adm_DAPRAMxLDSTAM_DAPRAMxLDSTAM_simm */
	/* adm_slsr
          --if shift_imm == 0 then
          --  shifter_operand = 0
          --  shifter_carry_out = Rm[31]
          --else shift_imm > 0 
          --  shifter_operand = Rm Logical_Shift_Right shift_imm
          --  shifter_carry_out = Rm[shift_imm - 1]
	*/
	mov r2,#0xc0000001
	add r0,r1,r2,lsr #0      
	add r0,r1,r2,lsr #1      
	add r0,r1,r2,lsr #2      
	add r0,r1,r2,lsr #31      

	/* adm_DAPRAMxLDSTAM_DAPRAMxLDSTAM_simm */
	/* adm_sasr
          --if shift_imm == 0 then
          --  if Rm[31] == 0 then
          --    shifter_operand = 0
          --    shifter_carry_out = Rm[31]
          --  else  Rm[31] == 1 
          --    shifter_operand = 0xFFFFFFFF
          --    shifter_carry_out = Rm[31]
          --else  shift_imm > 0 
          --  shifter_operand = Rm Arithmetic_Shift_Right <shift_imm>
          --  shifter_carry_out = Rm[shift_imm - 1]
	*/        
	mov r2,#0xc0000001
	add r0,r1,r2,asr #1      
	add r0,r1,r2,asr #2      
	add r0,r1,r2,asr #31      
	mov r2,#0xc0000001
	add r0,r1,r2,asr #0      
	mov r2,#0x40000001
	add r0,r1,r2,asr #0      

	/* adm_DAPRAMxLDSTAM_DAPRAMxLDSTAM_simm */
	/* adm_sror
          --if shift_imm == 0 then
          --  adm_srrx case
          --else shift_imm > 0 
          --  shifter_operand = Rm Rotate_Right shift_imm
          --  shifter_carry_out = Rm[shift_imm - 1]
	*/
	mov r2,#0xc0000001
	add r0,r1,r2,ror #0      
	add r0,r1,r2,ror #1      
	add r0,r1,r2,ror #3      
	add r0,r1,r2,ror #31      
	
	/* adm_DAPRAMxLDSTAM_DAPRAMxLDSTAM_simm */
	/* adm_srrx
	  --shifter_operand = (C Flag Logical_Shift_Left 31) OR (Rm Logical_Shift_Right 1)
          --shifter_carry_out = Rm[0]
        */
	mov r2,#0xc0000001
	add r0,r1,r2,rrx	
	add r0,r1,r2,rrx	

	
	
	
	
	
	
	/* coprocessor */
	mrc 15,1,r0,cr1,cr0
	orr r0,r0,#0x00000001		 
	mcr 15,0,r0,cr1,cr0
	
	
	
	
	
	
	
	
	
	
	
	
	
	
	
	
	
	
	
	
		
	
	        nop

	mov r0,   #0x00810000
	orr r0,r0,#0x0000000f		 
	mov r1,   #0x80000014		 
	str r0,[r1]
	        
	mov r0,   #0x04000000		 
	orr r0,r0,#0x00080000		 
	orr r0,r0,#0x00000300		 
	mov r1,   #0x80000000		 
	str r0,[r1]
	mov r0,   #0xd5000000		 
	orr r0,r0,#0x00380000		 
	orr r0,r0,#0x00004800		 
	orr r0,r0,#0x00000030		 
	mov r1,   #0x80000000		 
	orr r1,r1,#0x00000004
	str r0,[r1]
	mov r0,   #0x000f0000		 
	mov r1,   #0x80000000		 
	orr r1,r1,#0x00000008
	str r0,[r1]

	
	mov r0,#0x40000000		 
	mov r7,#0x12		 
	mov r1,#0x11		 
	mov r2,#0x12		 
	/*str r2,[r1,r2]
	nop*/
	nop
	str r7,[r0]
	nop
	ldr r7,[r0]
Label:	
	nop
	stmia r0,{r1,r2}
	nop
	ldmia r0,{r3,r4}
	b Label
		
	/* # add, lock r0 */ 
	adds r0,r0,r1  ; /* reg */
	/* r0 = 3 */
	/*adds r0,r1,r2,lsl #3*/  ; /* lsl imm */
	/* r0 = 1 + (2 * 2^3) = 5 */
	
        mov r0,#3		 
	adds r0,r1,r2,lsl r0  ; /* lsl reg */
	/* r0 = 1 + (2 * 2^3) = 5 */
	adds r0,r1,r4,lsr #1  ; /* lsr imm */
	/* r0 = 1 + (4 / 2) = 3 */
	adds r0,r1,r4,lsr r1  ; /* lsr reg */
	/* r0 = 1 + (4 / 2) = 3 */
	adds r0,r1,r7,asr #1  ; /* asr imm */
	/* r0 = 0 */
	adds r0,r1,r7,asr r1  ; /* asr reg */
	/* r0 = 0 */
	adds  r0,r1,r8,ror r2  ; /* ror reg */
	/* r0 = 0x3c3c3c3c + 1 */
	adds  r0,r1,r8,rrx     ; /* ror reg */
	/* r0 = 0x78787878 + 1 */

		
	/* # addc */
	addcs r0,r1,r2  ; /* reg */
	
	/* # and */
	ands r0,r1,r2  ; ; /* reg */
	
	/* # bic */
	bic r0,r1,r2  
	
	/* # cmn */

	; /* # cmp */

	; /* # eor */

	; /* # mov */

	; /* # mvn */

	; /* # orr */
	orr r0,r1,r2  
	
	; /* # rsb */

	; /* # rsc */

	; /* # sbc */
	sbc r0,r1,r2  
	
	; /* # sub */
	sub r0,r1,r2  
	
	; /* # teq */

	; /* # tst */

	
	
	mul  r0,r1,r2

	mul  r0,r3,r4

	
	
	; /* # load store */
	ldrb r0,[r1], #4          ; /* addr word :	 r1, r1 = r1 + 4 */ 
	
	
	ldr r0,[r0]              ; /* addr word : r0 */
	ldr r0,[r1,#4]		 ; /* addr word : r3 + 4 */
	ldr r0,[r1,#-4]          ; /* addr word : r3 + -4 */
	str r0,[r1,#0x100]       ; /* addr word : r1 + 0x100 */
	
	ldrb r0,[r1]		 ; /* addr byte :	 r1 */
	ldrb r0,[r1,#3]          ; /* addr byte :	 r1 + 3 */
	strb r4,[r1,#0x200]      ; /* addr byte :	 r1 + 0x200 */
	
	ldr r0,[r1,r2]           ; /* addr word :	 r1 + r2 */
	strb r0,[r1,-r2]         ; /* addr byte :	 r1 - r2 */
	
	ldr r0,[r1,r2,lsl #2]    ; /* addr word :	 r1 + (r2 * 4) */
	ldr r0,[r1,#4]!          ; /* addr word :	 r1 + 4, write back */
	strb r0,[r1,#-1]!        ; /* addr byte :	 r1 - 1, write back */
	
        
	ldr r0,[r1], #4          ; /* addr word :	 r1, r1 = r1 + 4 */ 
	str r0,[r1], #8          ; /* addr word :	 r1, r1 = r1 + 8 */

	ldr r0,[pc,#40]          ; /* addr word :	 pc + 0x40 = . + 8 + 0x40 */
	
	ldr r0,[r1], r2          ; /* addr word :	 r1, r1 = r1 + r2  */

	/* miscelanous */	
	ldrh r1,[r0]             ; /* addr hword :	 r0 */
	ldrh r0,[r1,#2]          ; /* addr hword :	 r1 + 2 */
	ldrh r0,[r1,#-16]        ; /* addr hword :	 r1 - 16 */
	strh r0,[r1,#0x80]       ; /* addr hword :	 r1 + 0x80 */

	ldrsh r0,[r1]            ; /* addr hword :	 r1 (signed extend) */
	ldrsb r0,[r1,#3]         ; /* addr byte :	r1 + 3 (signed extend) */ 
	ldrsb r0,[r1,#0xc1]       ; /* addr byte :	r1 + 0xc1 (signed extend) */

	ldrh r0,[r1,r2]          ; /* addr hword :	 r1 + r2
	strh r0,[r1,-r2]         ; /* addr hword :	 r1 - r2

	ldrsh r0,[r1,#2]         ; /* addr hword : r1 + 2 (signed extend */ 
	
	
	

	
	
	
	
	
	
	
	
		/*
	 * msr
	 * -- msr CPSR_[cxsf],#<imm>
	 * -- msr CPSR_[cxsf],<rm>
	 * -- msr SPSR_[cxsf],#<imm>
	 * -- msr SPSR_[cxsf],<rm>  
         */
	mov r13,#0x13 /* svc */
	mov r8,#0xaa
	
	msr CPSR_c,#0x17 /* abort */
 	mov r13,#0x17 
	mov r8,#0xaa
	
	msr CPSR_c,#0x1b /* undefined */
	mov r13,#0x1b 
	mov r8,#0xaa
	
	msr CPSR_c,#0x12 /* irq */
	mov r13,#0x12
	mov r8,#0xaa
	
	msr CPSR_c,#0x11 /* fiq */
	mov r13,#0x11 
	mov r8,#0x11  
	mov r12,#0x11 

	
	msr CPSR_c,#0x1f /* sys */
	mov r13,#0x1f 

	
	/* read in sys */
	msr CPSR_c,#0x1f 
	mov r1,r13   
	mov r1,r8   
	
	/* read in abort */
	msr CPSR_c,#0x17
	mov r1,r13
	mov r1,r8   
	
	/* read in svc */
	msr CPSR_c,#0x13
	mov r1,r13
	mov r1,r8   
	
	/* read in irq */
	msr CPSR_c,#0x12
	mov r1,r13
	mov r1,r8   

	/* read in fiq */
	msr CPSR_c,#0x11
	mov r1,r13
	mov r1,r8   

	/* read in undef */
	msr CPSR_c,#0x1b
	mov r1,r13
	mov r1,r8   

	
	
		




	/*
	 * msr
	 * -- msr CPSR_[cxsf],#<imm>
	 * -- msr CPSR_[cxsf],<rm>
	 * -- msr SPSR_[cxsf],#<imm>
	 * -- msr SPSR_[cxsf],<rm>  
         */
	mov r13,#0x13 /* svc */
	msr SPSR_c,#0x1 /* svc */
	
	msr CPSR_c,#0x17 /* abort */
	msr SPSR_c,#0x2 /* abort */
	
	msr CPSR_c,#0x1b /* undefined */
	msr SPSR_c,#0x3 /* undefined */
		
	msr CPSR_c,#0x12 /* irq */
	msr SPSR_c,#0x4 /* irq*/
	
	msr CPSR_c,#0x11 /* fiq */
	msr SPSR_c,#0x5 /* fiq */

	msr CPSR_c,#0x1f /* sys */
	msr SPSR_c,#0x6 /* sys */
	
	mrs r0,SPSR /* sys */
	
	msr CPSR_c,#0x11 /* fiq */
	mrs r0,SPSR /* fiq : 0x5 */
	
	msr CPSR_c,#0x12 /* irq */
	mrs r0,SPSR /* irq : 0x4 */
	
	msr CPSR_c,#0x1b /* undefined */
	mrs r0,SPSR /* undefined : 0x3 */

	msr CPSR_c,#0x17 /* abort */
	mrs r0,SPSR /* abort : 0x2 */

	msr CPSR_c,#0x13 /* svc */
	mrs r0,SPSR /* svc : 0x1 */























		mov r0,   #0x40000000
	mov r1,   #0x1
	ldr r1,[r0] 
	mov r1,   #0x2


	mov r1,#8
	sub r1,r1,r1
	bne loop5
	beq loop4
	
		
	swi 10
	
loop4:	mov r1,#10
loop5:	mov r1,#10
	
			mov r1,pc
	sub r1,r1,#8
	mov r0,#0x40000000
	str r1,[r0]
loop3:	ldr pc,[r0]
	nop
	nop
	nop
	nop
	nop
	nop	
	nop
	nop	
	nop
	nop