📄 sdram64m16.csf.rpt
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| Total fan-out | 676 |
| Average fan-out | 3.35 |
+----------------------------+----------------------+
+-----------------------------------------------------------------------------+
| Resource Utilization by Entity |
+-----------------------------------------------------------------------------+
+------------------------------------------+-------------+-----------+-------------+--------------+---------+-----------+-----------+------+--------------+--------------+-------------------+------------------+-----------------------------------------------------------------------------+
| Compilation Hierarchy Node | Logic Cells | Registers | Memory Bits | DSP Elements | DSP 9x9 | DSP 18x18 | DSP 36x36 | Pins | Virtual Pins | LUT-Only LCs | Register-Only LCs | LUT/Register LCs | Full Hierarchy Name |
+------------------------------------------+-------------+-----------+-------------+--------------+---------+-----------+-----------+------+--------------+--------------+-------------------+------------------+-----------------------------------------------------------------------------+
| |sdram64m16 | 155 (145) | 51 | 0 | 0 | 0 | 0 | 0 | 47 | 0 | 104 (104) | 1 (1) | 50 (40) | |sdram64m16 |
| |lpm_counter:temp_s0_403d_rtl_0| | 10 (0) | 10 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 (0) | 0 (0) | 10 (0) | |sdram64m16|lpm_counter:temp_s0_403d_rtl_0 |
| |alt_counter_stratix:wysi_counter| | 10 (10) | 10 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 (0) | 0 (0) | 10 (10) | |sdram64m16|lpm_counter:temp_s0_403d_rtl_0|alt_counter_stratix:wysi_counter |
+------------------------------------------+-------------+-----------+-------------+--------------+---------+-----------+-----------+------+--------------+--------------+-------------------+------------------+-----------------------------------------------------------------------------+
+-----------------------------------------------------------------------------+
| Input Pins |
+-----------------------------------------------------------------------------+
+---------------+-------+--------------+--------------+-------------+-----------------------+--------------------+--------+----------------+---------------+-----------------+----------+--------------+--------------+-------------+
| Name | Pin # | X coordinate | Y coordinate | Cell number | Combinational Fan-Out | Registered Fan-Out | Global | Input Register | Power Up High | PCI I/O Enabled | Bus Hold | Weak Pull Up | I/O Standard | Termination |
+---------------+-------+--------------+--------------+-------------+-----------------------+--------------------+--------+----------------+---------------+-----------------+----------+--------------+--------------+-------------+
| clkmain1 | 29 | 0 | 11 | 0 | 52 | 0 | yes | no | no | no | no | Off | LVTTL | Off |
| reset_1 | 28 | 0 | 12 | 2 | 36 | 0 | yes | no | no | no | no | Off | LVTTL | Off |
| xcasaddr_3[0] | 180 | 35 | 20 | 0 | 1 | 0 | no | no | no | no | no | Off | LVTTL | Off |
| xcasaddr_3[1] | 144 | 35 | 9 | 0 | 1 | 0 | no | no | no | no | no | Off | LVTTL | Off |
| xcasaddr_3[2] | 168 | 35 | 17 | 2 | 1 | 0 | no | no | no | no | no | Off | LVTTL | Off |
| xcasaddr_3[3] | 176 | 35 | 19 | 2 | 1 | 0 | no | no | no | no | no | Off | LVTTL | Off |
| xcasaddr_3[4] | 184 | 32 | 21 | 0 | 1 | 0 | no | no | no | no | no | Off | LVTTL | Off |
| xcasaddr_3[5] | 178 | 35 | 19 | 0 | 1 | 0 | no | no | no | no | no | Off | LVTTL | Off |
| xcasaddr_3[6] | 195 | 28 | 21 | 1 | 1 | 0 | no | no | no | no | no | Off | LVTTL | Off |
| xcasaddr_3[7] | 196 | 28 | 21 | 2 | 1 | 0 | no | no | no | no | no | Off | LVTTL | Off |
| xlength_3[0] | 200 | 24 | 21 | 0 | 1 | 0 | no | no | no | no | no | Off | LVTTL | Off |
| xlength_3[1] | 204 | 22 | 21 | 1 | 1 | 0 | no | no | no | no | no | Off | LVTTL | Off |
| xlength_3[2] | 159 | 35 | 13 | 0 | 1 | 0 | no | no | no | no | no | Off | LVTTL | Off |
| xlength_3[3] | 143 | 35 | 9 | 1 | 1 | 0 | no | no | no | no | no | Off | LVTTL | Off |
| xlength_3[4] | 161 | 35 | 14 | 0 | 1 | 0 | no | no | no | no | no | Off | LVTTL | Off |
| xlength_3[5] | 158 | 35 | 13 | 1 | 1 | 0 | no | no | no | no | no | Off | LVTTL | Off |
| xlength_3[6] | 156 | 35 | 13 | 2 | 1 | 0 | no | no | no | no | no | Off | LVTTL | Off |
| xlength_3[7] | 160 | 35 | 14 | 1 | 2 | 0 | no | no | no | no | no | Off | LVTTL | Off |
| xrasaddr_3[0] | 187 | 30 | 21 | 0 | 1 | 0 | no | no | no | no | no | Off | LVTTL | Off |
| xrasaddr_3[1] | 183 | 34 | 21 | 2 | 1 | 0 | no | no | no | no | no | Off | LVTTL | Off |
| xrasaddr_3[2] | 174 | 35 | 18 | 1 | 1 | 0 | no | no | no | no | no | Off | LVTTL | Off |
| xrasaddr_3[3] | 186 | 32 | 21 | 2 | 1 | 0 | no | no | no | no | no | Off | LVTTL | Off |
| xrasaddr_3[4] | 177 | 35 | 19 | 1 | 1 | 0 | no | no | no | no | no | Off | LVTTL | Off |
| xrasaddr_3[5] | 181 | 34 | 21 | 0 | 1 | 0 | no | no | no | no | no | Off | LVTTL | Off |
| xrasaddr_3[6] | 197 | 26 | 21 | 0 | 1 | 0 | no | no | no | no | no | Off | LVTTL | Off |
| xrasaddr_3[7] | 205 | 22 | 21 | 2 | 1 | 0 | no | no | no | no | no | Off | LVTTL | Off |
| xrasaddr_3[8] | 167 | 35 | 16 | 0 | 1 | 0 | no | no | no | no | no | Off | LVTTL | Off |
| xrasaddr_3[9] | 198 | 26 | 21 | 1 | 1 | 0 | no | no | no | no | no | Off | LVTTL | Off |
| xread_1 | 194 | 28 | 21 | 0 | 5 | 0 | no | no | no | no | no | Off | LVTTL | Off |
| xwrite_1 | 165 | 35 | 16 | 2 | 8 | 0 | no | no | no | no | no | Off | LVTTL | Off |
+---------------+-------+--------------+--------------+-------------+-----------------------+--------------------+--------+----------------+---------------+-----------------+----------+--------------+--------------+-------------+
+-----------------------------------------------------------------------------+
| Output Pins |
+-----------------------------------------------------------------------------+
+-----------------+-------+--------------+--------------+-------------+-----------------+------------------------+---------------+----------------+-----------------+------------+----------+--------------+-----------+--------------+------------------+-------------+
| Name | Pin # | X coordinate | Y coordinate | Cell number | Output Register | Output Enable Register | Power Up High | Slow Slew Rate | PCI I/O Enabled | Open Drain | Bus Hold | Weak Pull Up | Turbo Bit | I/O Standard | Current Strength | Termination |
+-----------------+-------+--------------+--------------+-------------+-----------------+------------------------+---------------+----------------+-----------------+------------+----------+--------------+-----------+--------------+------------------+-------------+
| a8_p0_402d | 166 | 35 | 16 | 1 | no | no | no | no | no | no | no | Off | no | LVTTL | 12mA | Off |
| addr_p3_402d[0] | 179 | 35 | 20 | 1 | no | no | no | no | no | no | no | Off | no | LVTTL | 12mA | Off |
| addr_p3_402d[1] | 182 | 34 | 21 | 1 | no | no | no | no | no | no | no | Off | no | LVTTL | 12mA | Off |
| addr_p3_402d[2] | 175 | 35 | 18 | 0 | no | no | no | no | no | no | no | Off | no | LVTTL | 12mA | Off |
| addr_p3_402d[3] | 185 | 32 | 21 | 1 | no | no | no | no | no | no | no | Off | no | LVTTL | 12mA | Off |
| addr_p3_402d[4] | 188 | 30 | 21 | 1 | no | no | no | no | no | no | no | Off | no | LVTTL | 12mA | Off |
| addr_p3_402d[5] | 173 | 35 | 18 | 2 | no | no | no | no | no | no | no | Off | no | LVTTL | 12mA | Off |
| addr_p3_402d[6] | 199 | 26 | 21 | 2 | no | no | no | no | no | no | no | Off | no | LVTTL | 12mA | Off |
| addr_p3_402d[7] | 201 | 24 | 21 | 1 | no | no | no | no | no | no | no | Off | no | LVTTL | 12mA | Off |
| ba_p3_402d | 202 | 24 | 21 | 2 | no | no | no | no | no | no | no | Off | no | LVTTL | 12mA | Off |
| cas_p1_402d | 170 | 35 | 17 | 0 | no | no | no | no | no | no | no | Off | no | LVTTL | 12mA | Off |
| cs_p1_402d | 163 | 35 | 15 | 1 | no | no | no | no | no | no | no | Off | no | LVTTL | 12mA | Off |
| dqm_p3_402d | 162 | 35 | 15 | 2 | no | no | no | no | no | no | no | Off | no | LVTTL | 12mA | Off |
| ras_p1_402d | 169 | 35 | 17 | 1 | no | no | no | no | no | no | no | Off | no | LVTTL | 12mA | Off |
| ready_p1_402d | 164 | 35 | 15 | 0 | no | no | no | no | no | no | no | Off | no | LVTTL | 12mA | Off |
| sdramclk | 60 | 0 | 1 | 1 | no | no | no | no | no | no | no | Off | no | LVTTL | 12mA | Off |
| we_p1_402d | 193 | 30 | 21 | 2 | no | no | no | no | no | no | no | Off | no | LVTTL | 12mA | Off |
+-----------------+-------+--------------+--------------+-------------+-----------------+------------------------+---------------+----------------+-----------------+------------+----------+--------------+-----------+--------------+------------------+-------------+
+-----------------------------------------------------------------------------+
| Delay Chain Summary |
+-----------------------------------------------------------------------------+
+-----------------+----------+---------------+---------------+-----------------------+-----+
| Name | Pin Type | Pad to Core 0 | Pad to Core 1 | Pad to Input Register | TCO |
+-----------------+----------+---------------+---------------+-----------------------+-----+
| clkmain1 | Input | OFF | OFF | OFF | OFF |
| xlength_3[7] | Input | ON | ON | OFF | OFF |
| xlength_3[6] | Input | ON | ON | OFF | OFF |
| xlength_3[5] | Input | ON | ON | OFF | OFF |
| xlength_3[4] | Input | ON | ON | OFF | OFF |
| xlength_3[3] | Input | ON | ON | OFF | OFF |
| xlength_3[2] | Input | ON | ON | OFF | OFF |
| xlength_3[1] | Input | ON | ON | OFF | OFF |
| xlength_3[0] | Input | ON | ON | OFF | OFF |
| reset_1 | Input | OFF | OFF | OFF | OFF |
| xrasaddr_3[7] | Input | ON | ON | OFF | OFF |
| xcasaddr_3[7] | Input | ON | ON | OFF | OFF |
| xrasaddr_3[6] | Input | ON | ON | OFF | OFF |
| xcasaddr_3[6] | Input | ON | ON | OFF | OFF |
| xrasaddr_3[5] | Input | ON | ON | OFF | OFF |
| xcasaddr_3[5] | Input | ON | ON | OFF | OFF |
| xrasaddr_3[4] | Input | ON | ON | OFF | OFF |
| xcasaddr_3[4] | Input | ON | ON | OFF | OFF |
| xrasaddr_3[3] | Input | ON | ON | OFF | OFF |
| xcasaddr_3[3] | Input | ON | ON | OFF | OFF |
| xrasaddr_3[2] | Input | ON | ON | OFF | OFF |
| xcasaddr_3[2] | Input | ON | ON | OFF | OFF |
| xrasaddr_3[1] | Input | ON | ON | OFF | OFF |
| xcasaddr_3[1] | Input | ON | ON | OFF | OFF |
| xrasaddr_3[0] | Input | ON | ON | OFF | OFF |
| xcasaddr_3[0] | Input | ON | ON | OFF | OFF |
| xrasaddr_3[8] | Input | ON | ON | OFF | OFF |
| xrasaddr_3[9] | Input | ON | ON | OFF | OFF |
| xwrite_1 | Input | ON | ON | OFF | OFF |
| xread_1 | Input | ON | ON | OFF | OFF |
| sdramclk | Output | OFF | OFF | OFF | OFF |
| ready_p1_402d | Output | OFF | OFF | OFF | OFF |
| cs_p1_402d | Output | OFF | OFF | OFF | OFF |
| ras_p1_402d | Output | OFF | OFF | OFF | OFF |
| cas_p1_402d | Output | OFF | OFF | OFF | OFF |
| addr_p3_402d[7] | Output | OFF | OFF | OFF | OFF |
| addr_p3_402d[6] | Output | OFF | OFF | OFF | OFF |
| addr_p3_402d[5] | Output | OFF | OFF | OFF | OFF |
| addr_p3_402d[4] | Output | OFF | OFF | OFF | OFF |
| addr_p3_402d[3] | Output | OFF | OFF | OFF | OFF |
| addr_p3_402d[2] | Output | OFF | OFF | OFF | OFF |
| addr_p3_402d[1] | Output | OFF | OFF | OFF | OFF |
| addr_p3_402d[0] | Output | OFF | OFF | OFF | OFF |
| a8_p0_402d | Output | OFF | OFF | OFF | OFF |
| ba_p3_402d | Output | OFF | OFF | OFF | OFF |
| we_p1_402d | Output | OFF | OFF | OFF | OFF |
| dqm_p3_402d | Output | OFF | OFF | OFF | OFF |
+-----------------+----------+---------------+---------------+-----------------------+-----+
+-----------------------------------------------------------------------------+
| I/O Bank Usage |
+-----------------------------------------------------------------------------+
+--------+------------------+
| Bank # | Usage |
+--------+------------------+
| 1 | 3 / 44 ( 6 % ) |
| 2 | 20 / 48 ( 41 % ) |
| 3 | 24 / 45 ( 53 % ) |
| 4 | 0 / 48 ( 0 % ) |
+--------+------------------+
+-----------------------------------------------------------------------------+
| All Package Pins |
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