sdram64m16.eqn

用FPGA实现SDRAM的操作

--A1L871 is reduce_nor_6_rtl_0~112 at LC_X31_Y17_N0
--operation mode is normal

A1L871 = !temp_s0_402d[1] & temp_s0_402d[0];


--A1L631 is i~17477 at LC_X30_Y17_N2
--operation mode is normal

A1L631 = temp0_s0_401u[3] # temp0_s0_401u[1] & !temp0_s0_401u[0] & temp0_s0_401u[2] # !temp0_s0_401u[1] & !temp0_s0_401u[2];


--reduce_nor_138 is reduce_nor_138 at LC_X30_Y16_N1
--operation mode is normal

reduce_nor_138 = temp0_s0_401u[2] # temp0_s0_401u[1] # temp0_s0_401u[3] # temp0_s0_401u[0];


--length_s0_402d[0] is length_s0_402d[0] at LC_X27_Y14_N7
--operation mode is normal

length_s0_402d[0]_lut_out = A1L481 & !A1L971 & A1L98 # !A1L481 & A1L421;
length_s0_402d[0] = DFFEA(length_s0_402d[0]_lut_out, GLOBAL(clkmain1), VCC, A1L17, , );


--length_s0_402d[1] is length_s0_402d[1] at LC_X27_Y14_N0
--operation mode is normal

length_s0_402d[1]_lut_out = A1L481 & !A1L971 & A1L88 # !A1L481 & A1L121;
length_s0_402d[1] = DFFEA(length_s0_402d[1]_lut_out, GLOBAL(clkmain1), VCC, A1L17, , );


--A1L861 is LessThan_469~97 at LC_X27_Y14_N2
--operation mode is normal

A1L861 = xlength_3[1] & (xlength_3[0] & !length_s0_402d[0] # !length_s0_402d[1]) # !xlength_3[1] & xlength_3[0] & !length_s0_402d[0] & !length_s0_402d[1];


--length_s0_402d[2] is length_s0_402d[2] at LC_X28_Y14_N9
--operation mode is normal

length_s0_402d[2]_lut_out = A1L481 & A1L78 & !A1L971 # !A1L481 & A1L811;
length_s0_402d[2] = DFFEA(length_s0_402d[2]_lut_out, GLOBAL(clkmain1), VCC, A1L17, , );


--A1L961 is LessThan_469~102 at LC_X29_Y14_N0
--operation mode is normal

A1L961 = xlength_3[2] & (A1L861 # !length_s0_402d[2]) # !xlength_3[2] & !length_s0_402d[2] & A1L861;


--length_s0_402d[3] is length_s0_402d[3] at LC_X29_Y14_N9
--operation mode is normal

length_s0_402d[3]_lut_out = A1L971 & length_s0_402d[3] & !A1L481 # !A1L971 & A1L611;
length_s0_402d[3] = DFFEA(length_s0_402d[3]_lut_out, GLOBAL(clkmain1), VCC, A1L17, , );


--A1L071 is LessThan_469~104 at LC_X29_Y14_N1
--operation mode is normal

A1L071 = xlength_3[3] & (A1L961 # !length_s0_402d[3]) # !xlength_3[3] & !length_s0_402d[3] & A1L961;


--length_s0_402d[4] is length_s0_402d[4] at LC_X28_Y14_N6
--operation mode is normal

length_s0_402d[4]_lut_out = A1L971 & !A1L481 & length_s0_402d[4] # !A1L971 & A1L511;
length_s0_402d[4] = DFFEA(length_s0_402d[4]_lut_out, GLOBAL(clkmain1), VCC, A1L17, , );


--A1L171 is LessThan_469~109 at LC_X29_Y14_N2
--operation mode is normal

A1L171 = xlength_3[4] & (A1L071 # !length_s0_402d[4]) # !xlength_3[4] & !length_s0_402d[4] & A1L071;


--length_s0_402d[5] is length_s0_402d[5] at LC_X31_Y14_N9
--operation mode is normal

length_s0_402d[5]_lut_out = A1L971 & length_s0_402d[5] & !A1L481 # !A1L971 & A1L411;
length_s0_402d[5] = DFFEA(length_s0_402d[5]_lut_out, GLOBAL(clkmain1), VCC, A1L17, , );


--A1L271 is LessThan_469~111 at LC_X29_Y14_N3
--operation mode is normal

A1L271 = xlength_3[5] & (A1L171 # !length_s0_402d[5]) # !xlength_3[5] & !length_s0_402d[5] & A1L171;


--length_s0_402d[6] is length_s0_402d[6] at LC_X30_Y14_N1
--operation mode is normal

length_s0_402d[6]_lut_out = A1L971 & length_s0_402d[6] & !A1L481 # !A1L971 & A1L311;
length_s0_402d[6] = DFFEA(length_s0_402d[6]_lut_out, GLOBAL(clkmain1), VCC, A1L17, , );


--A1L371 is LessThan_469~116 at LC_X29_Y14_N4
--operation mode is normal

A1L371 = length_s0_402d[6] & xlength_3[6] & A1L271 # !length_s0_402d[6] & (xlength_3[6] # A1L271);


--length_s0_402d[7] is length_s0_402d[7] at LC_X30_Y14_N3
--operation mode is normal

length_s0_402d[7]_lut_out = A1L971 & length_s0_402d[7] & !A1L481 # !A1L971 & A1L011;
length_s0_402d[7] = DFFEA(length_s0_402d[7]_lut_out, GLOBAL(clkmain1), VCC, A1L17, , );


--A1L761 is LessThan_469~95 at LC_X29_Y14_N5
--operation mode is normal

A1L761 = length_s0_402d[7] & xlength_3[7] & A1L371 # !length_s0_402d[7] & (xlength_3[7] # A1L371);


--A1L241 is i~17491 at LC_X30_Y15_N3
--operation mode is normal

A1L241 = A1L871 & A1L631 & reduce_nor_138 & !A1L761;


--A1L041 is i~17483 at LC_X30_Y17_N1
--operation mode is normal

A1L041 = !temp0_s0_401u[3] & (temp0_s0_401u[0] # !temp0_s0_401u[1] # !temp0_s0_401u[2]);


--A1L841 is i~17563 at LC_X30_Y15_N9
--operation mode is normal

A1L841 = !A1L041 & reduce_nor_120 & (temp_s0_402d[1] # temp_s0_402d[0]);


--A1L941 is i~17581 at LC_X30_Y16_N7
--operation mode is normal

A1L941 = A1L97Q & !temp_s0_402d[1] & temp_s0_402d[0] # !A1L97Q & (temp_s0_402d[1] # temp_s0_402d[0]);


--A1L531 is i~17476 at LC_X30_Y16_N5
--operation mode is normal

A1L531 = !temp0_s0_401u[1] & !temp0_s0_401u[3] & temp0_s0_401u[0];


--A1L231 is i~14390 at LC_X31_Y17_N4
--operation mode is normal

A1L231 = !temp0_s0_401u[2] & temp0_s0_401u[0] & !temp0_s0_401u[1] & !temp_s0_402d[0];


--A1L331 is i~14396 at LC_X31_Y17_N5
--operation mode is normal

A1L331 = !temp0_s0_401u[3] & (A1L231 # A1L871 & A1L621);


--A1L831 is i~17480 at LC_X31_Y17_N7
--operation mode is normal

A1L831 = !temp_s0_402d[1] & !temp0_s0_401u[3];


--A1L721 is i~10407 at LC_X31_Y17_N1
--operation mode is normal

A1L721 = !temp0_s0_401u[3] & (temp0_s0_401u[0] & temp0_s0_401u[1] # !temp0_s0_401u[2]);


--A1L19 is i~5291 at LC_X31_Y17_N2
--operation mode is normal

A1L19 = !A1L67Q & (temp_s0_402d[0] # temp_s0_402d[1] # A1L721);


--reduce_nor_295 is reduce_nor_295 at LC_X29_Y17_N8
--operation mode is normal

temp0_s0_401u[3]_qfbk = temp0_s0_401u[3];
reduce_nor_295 = temp0_s0_401u[0] # temp0_s0_401u[3]_qfbk # temp0_s0_401u[1] # !temp0_s0_401u[2];

--temp0_s0_401u[3] is temp0_s0_401u[3] at LC_X29_Y17_N8
--operation mode is normal

temp0_s0_401u[3]_sload_eqn = (VCC & temp1_s0_401u[3]) # (GND & reduce_nor_295);
temp0_s0_401u[3] = DFFEA(temp0_s0_401u[3]_sload_eqn, GLOBAL(clkmain1), GLOBAL(reset_1), A1L661, , );


--A1L441 is i~17494 at LC_X30_Y17_N9
--operation mode is normal

A1L441 = !temp0_s0_401u[3] & temp0_s0_401u[2] & temp0_s0_401u[0] & temp0_s0_401u[1];


--A1L39 is i~5390 at LC_X29_Y18_N0
--operation mode is normal

A1L39 = reduce_nor_295 & !A1L441 & A1L041;


--A1L49 is i~5395 at LC_X28_Y18_N4
--operation mode is normal

A1L49 = A1L27Q & (temp_s0_402d[0] # A1L39 # temp_s0_402d[1]);


--A1L29 is i~5383 at LC_X28_Y18_N8
--operation mode is normal

A1L29 = A1L441 & xrasaddr_3[7] # !A1L441 & xcasaddr_3[7] & !A1L041;


--A1L481 is reduce_nor_218~19 at LC_X29_Y16_N4
--operation mode is normal

A1L481 = temp0_s0_401u[2] & !temp0_s0_401u[1] & !temp0_s0_401u[3] & temp0_s0_401u[0];


--A1L07 is addr_p3_402d[7]~4 at LC_X30_Y16_N2
--operation mode is normal

A1L07 = reset_1 & !A1L481 & (temp0_s0_401u[2] # temp0_s0_401u[3]);


--A1L69 is i~5499 at LC_X28_Y18_N3
--operation mode is normal

A1L69 = A1L86Q & (temp_s0_402d[1] # A1L39 # temp_s0_402d[0]);


--A1L59 is i~5487 at LC_X28_Y18_N9
--operation mode is normal

A1L59 = A1L441 & xrasaddr_3[6] # !A1L441 & xcasaddr_3[6] & !A1L041;


--A1L051 is i~17605 at LC_X34_Y18_N7
--operation mode is normal

A1L051 = xrasaddr_3[5] & A1L441 # !reduce_nor_295;


--A1L79 is i~5505 at LC_X34_Y18_N8
--operation mode is normal

A1L79 = A1L051 # !A1L441 & xcasaddr_3[5] & !A1L041;


--A1L641 is i~17498 at LC_X30_Y18_N1
--operation mode is normal

A1L641 = A1L041 & !A1L441;


--A1L99 is i~5622 at LC_X31_Y18_N6
--operation mode is normal

A1L99 = A1L46Q & (temp_s0_402d[0] # temp_s0_402d[1] # A1L39);


--A1L89 is i~5610 at LC_X32_Y18_N2
--operation mode is normal

A1L89 = A1L441 & xrasaddr_3[4] # !A1L441 & xcasaddr_3[4] & !A1L041;


--A1L101 is i~5726 at LC_X31_Y18_N3
--operation mode is normal

A1L101 = A1L26Q & (temp_s0_402d[0] # temp_s0_402d[1] # A1L39);


--A1L001 is i~5714 at LC_X32_Y18_N0
--operation mode is normal

A1L001 = A1L441 & xrasaddr_3[3] # !A1L441 & xcasaddr_3[3] & !A1L041;


--A1L151 is i~17616 at LC_X34_Y18_N2
--operation mode is normal

A1L151 = xrasaddr_3[2] & A1L441 # !reduce_nor_295;


--A1L201 is i~5732 at LC_X34_Y18_N3
--operation mode is normal

A1L201 = A1L151 # !A1L441 & !A1L041 & xcasaddr_3[2];


--A1L251 is i~17627 at LC_X34_Y18_N1
--operation mode is normal

A1L251 = xrasaddr_3[1] & A1L441 # !reduce_nor_295;


--A1L301 is i~5751 at LC_X34_Y18_N5
--operation mode is normal

A1L301 = A1L251 # !A1L441 & xcasaddr_3[1] & !A1L041;


--A1L351 is i~17638 at LC_X30_Y18_N4
--operation mode is normal

A1L351 = xrasaddr_3[0] & A1L441 # !reduce_nor_295;


--A1L401 is i~5770 at LC_X33_Y18_N3
--operation mode is normal

A1L401 = A1L351 # xcasaddr_3[0] & !A1L041 & !A1L441;


--A1L601 is i~5811 at LC_X29_Y16_N1
--operation mode is normal

A1L601 = xrasaddr_3[8] & A1L441 # !reduce_nor_138;


--A1L501 is i~5806 at LC_X29_Y16_N9
--operation mode is normal

A1L501 = temp_s0_402d[1] # !A1L441 & reduce_nor_138;


--A1L701 is i~5816 at LC_X29_Y16_N2
--operation mode is normal

A1L701 = A1L2Q & (A1L501 # A1L971 & A1L601) # !A1L2Q & A1L971 & A1L601;


--A1L661 is LessThan_121~5 at LC_X29_Y16_N0
--operation mode is normal

A1L661 = temp_s0_402d[0] & temp_s0_402d[1];


--A1L801 is i~5976 at LC_X28_Y18_N6
--operation mode is normal

A1L801 = A1L971 & reduce_nor_295 & xrasaddr_3[9] & !A1L641;


--A1L741 is i~17500 at LC_X30_Y17_N5
--operation mode is normal

A1L741 = A1L831 & (!temp0_s0_401u[2] & temp0_s0_401u[1] # !temp0_s0_401u[0]);


--A1L381 is reduce_nor_166~13 at LC_X30_Y17_N7
--operation mode is normal

A1L381 = temp0_s0_401u[0] & temp0_s0_401u[1];


--A1L901 is i~6451 at LC_X30_Y16_N6
--operation mode is normal

A1L901 = !temp0_s0_401u[2] & !temp0_s0_401u[3] & A1L381 # !reduce_nor_138;


--A1L821 is i~12387 at LC_X30_Y17_N8
--operation mode is normal

A1L821 = temp0_s0_401u[2] $ !temp_s0_402d[0] # !A1L381 # !A1L831;


--A1L451 is i~17697 at LC_X30_Y15_N2
--operation mode is normal

A1L451 = A1L971 & (A1L901 # !A1L18Q & A1L821) # !A1L971 & !A1L18Q & A1L821;


--reduce_nor_398 is reduce_nor_398 at LC_X30_Y17_N0
--operation mode is normal

reduce_nor_398 = temp0_s0_401u[3] # temp0_s0_401u[0] # !temp0_s0_401u[1] # !temp0_s0_401u[2];


--A1L58 is i~3768 at LC_X30_Y15_N5
--operation mode is normal

A1L58 = temp_s0_402d[1] & (A1L041 # !temp_s0_402d[0]) # !temp_s0_402d[1] & temp_s0_402d[0] & !A1L041 & !A1L761;


--A1L68 is i~3780 at LC_X30_Y15_N6
--operation mode is normal

A1L68 = A1L631 & A1L58 # !A1L631 & (temp_s0_402d[1] $ temp_s0_402d[0]);


--A1L38 is i~3162 at LC_X30_Y15_N7
--operation mode is normal

A1L38 = reduce_nor_138 & A1L68 # !reduce_nor_138 & (temp_s0_402d[1] $ temp_s0_402d[0]);


--A1L031 is i~13141 at LC_X30_Y14_N8
--operation mode is normal

A1L031 = !temp_s0_402d[1] & (!A1L531 # !temp_s0_402d[0] # !temp0_s0_401u[2]);


--A1L551 is i~17712 at LC_X30_Y14_N7
--operation mode is normal

A1L551 = !length_s0_402d[5] & !length_s0_402d[7] & !length_s0_402d[4] & !length_s0_402d[6];


--A1L651 is i~17729 at LC_X30_Y14_N5
--operation mode is normal

A1L651 = !length_s0_402d[3] & (!length_s0_402d[0] & !length_s0_402d[1] # !length_s0_402d[2]);


--A1L921 is i~13121 at LC_X30_Y14_N4
--operation mode is normal

A1L921 = !temp0_s0_401u[2] # !A1L551 # !A1L651;


--refreshask_s1_404u is refreshask_s1_404u at LC_X30_Y16_N3
--operation mode is normal

refreshask_s1_404u_lut_out = !refreshack_s1_402d & (refreshask_s1_404u # !A1L981 & A1L781);
refreshask_s1_404u = DFFEA(refreshask_s1_404u_lut_out, GLOBAL(clkmain1), GLOBAL(reset_1), , , );


--A1L931 is i~17482 at LC_X28_Y17_N4
--operation mode is normal

A1L931 = xread_1 & !refreshask_s1_404u;


--temp1_s0_401u[1] is temp1_s0_401u[1] at LC_X29_Y17_N6
--operation mode is normal

temp1_s0_401u[1]_lut_out = A1L081 & temp2_s0_401u[1] # !A1L081 & A1L931 & (temp2_s0_401u[1] # !xwrite_1);
temp1_s0_401u[1] = DFFEA(temp1_s0_401u[1]_lut_out, GLOBAL(clkmain1), GLOBAL(reset_1), A1L661, , );


--temp1_s0_401u[3] is temp1_s0_401u[3] at LC_X29_Y17_N4
--operation mode is normal

temp1_s0_401u[3]_lut_out = !A1L081 & !xread_1 & !refreshask_s1_404u;
temp1_s0_401u[3] = DFFEA(temp1_s0_401u[3]_lut_out, GLOBAL(clkmain1), GLOBAL(reset_1), A1L661, , );


--temp1_s0_401u[0] is temp1_s0_401u[0] at LC_X29_Y17_N3
--operation mode is normal

temp1_s0_401u[0]_lut_out = A1L931 & (temp2_s0_401u[0] # !xwrite_1 & !A1L081) # !A1L931 & temp2_s0_401u[0] & A1L081;
temp1_s0_401u[0] = DFFEA(temp1_s0_401u[0]_lut_out, GLOBAL(clkmain1), GLOBAL(reset_1), A1L661, , );


--temp1_s0_401u[2] is temp1_s0_401u[2] at LC_X29_Y17_N5
--operation mode is normal

temp1_s0_401u[2]_lut_out = A1L931 & temp2_s0_401u[2] & (xwrite_1 # A1L081) # !A1L931 & (temp2_s0_401u[2] # !A1L081);
temp1_s0_401u[2] = DFFEA(temp1_s0_401u[2]_lut_out, GLOBAL(clkmain1), GLOBAL(reset_1), A1L661, , );


--A1L081 is reduce_nor_7~8 at LC_X29_Y17_N7
--operation mode is normal

A1L081 = temp1_s0_401u[1] # temp1_s0_401u[0] # temp1_s0_401u[3] # !temp1_s0_401u[2];


--A1L541 is i~17497 at LC_X29_Y16_N5
--operation mode is normal

A1L541 = !refreshask_s1_404u & !A1L081;


--A1L141 is i~17489 at LC_X28_Y14_N1
--operation mode is normal

A1L141 = !A1L041 & (xlength_3[7] & (A1L371 # !length_s0_402d[7]) # !xlength_3[7] & !length_s0_402d[7] & A1L371);


--A1L321 is i~9816 at LC_X28_Y14_N7
--operation mode is normal

A1L321 = !A1L441 & (A1L3 # !A1L141);