pll1.fit

PLL是数字锁相环设计源程序, 其中, Fi是输入频率(接收数据), Fo(Q5)是本地输出频率. 目的是从输入数据中提取时钟信号(Q5), 其频率与数据速率一致, 时钟上升沿锁定在数据的上升和下降沿

-- MAX+plus II Compiler Fit File      
-- Version 10.0 9/14/2000             
-- Compiled: 05/27/2003 15:02:31      

-- Copyright (C) 1988-2000 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera.  Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner.  Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors.  No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.

CHIP "pll1"
BEGIN

    DEVICE = "EPM7032BLC44-3";

    "fi"                           : INPUT_PIN  = 43     ;
    "fosc"                         : INPUT_PIN  = 2      ;
    "reset"                        : INPUT_PIN  = 4      ; -- LC1
    "ahead"                        : OUTPUT_PIN = 28     ; -- LC28
    "fo"                           : OUTPUT_PIN = 41     ; -- LC17
    "lag"                          : OUTPUT_PIN = 29     ; -- LC27
    ":1"                           : LOCATION   = LC26   ; -- PIN 31
    "|74163:26|p74163:sub|:34"     : LOCATION   = LC25   ; -- PIN 32  -- |74163:26|p74163:sub|QA
    "|74163:26|p74163:sub|:35"     : LOCATION   = LC24   ; -- PIN 33  -- |74163:26|p74163:sub|QB
    "|74163:26|p74163:sub|:36"     : LOCATION   = LC23   ; -- PIN 34  -- |74163:26|p74163:sub|QC
    "|74163:26|p74163:sub|:37"     : LOCATION   = LC22   ; -- PIN 36  -- |74163:26|p74163:sub|QD
    "|74163:27|p74163:sub|:34"     : LOCATION   = LC21   ; -- PIN 37  -- |74163:27|p74163:sub|QA
    "|74169:3|:3"                  : LOCATION   = LC20   ; -- PIN 38  -- |74169:3|Q0
    "|74169:3|:15"                 : LOCATION   = LC19   ; -- PIN 39  -- |74169:3|Q1
    "|74169:3|:29"                 : LOCATION   = LC18   ; -- PIN 40  -- |74169:3|Q2

END;

INTERNAL_INFO "pll1"
BEGIN
	DEVICE = EPM7032BLC44-3;
	LC27    : LORAX = "G40R0";
	LC28    : LORAX = "G41R0";
	LC17    : LORAX = "G13R0,PA7R0C1";
	LC18    : LORAX = "G14R0,PA5R0C1";
	OH32R0P43 : LORAX = "G59R0,PA27R0C1";
	OH0R0P4 : LORAX = "G43R0,PA20R0C1";
	LC26    : LORAX = "G39R0,PA21R0C1";
	LC19    : LORAX = "G15R0,PA3R0C1";
	LC20    : LORAX = "G16R0,PA1R0C1";
	LC22    : LORAX = "G31R0,PA14R0C1";
	LC23    : LORAX = "G32R0,PA12R0C1";
	LC21    : LORAX = "G30R0,PA16R0C1";
	LC24    : LORAX = "G33R0,PA10R0C1";
	LC25    : LORAX = "G38R0,PA18R0C1";
END;