fen_fen_test_v_tf.tdo

来自「verilog」· TDO 代码 · 共 18 行

## NOTE: Do not edit this file.
## Auto generated by Project Navigator for Verilog Post-PAR Simulation
##
vlib work
## Compile Post-PAR Model for Module fen
vlog  "E:/Xilinx/verilog/src/glbl.v"
vlog  fen_timesim.v
vlog  fen_test.v
vsim -t 1ps +maxdelays -L simprims_ver  -lib work fen_fen_test_v_tf glbl
do fen_fen_test_v_tf.udo
view wave
add wave *
add wave /glbl/GSR
view structure
view signals
run 1000ns
## End