xnor2.vhd

本人初学VHDL时编的比较系统的VHDL源程序 巨实用

library IEEE;
use IEEE.std_logic_1164.all;

entity xnor2 is
    port (
        a: in STD_LOGIC;
        b: in STD_LOGIC;
        z: out STD_LOGIC
    );
end xnor2;

architecture xnor2_arch of xnor2 is
begin                      
 z<=a xnor b;-- <<enter your statements here>>
end xnor2_arch;