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来自「verilog的入门级别的例子(转载)」· HTML 代码 · 共 352 行 · 第 1/2 页

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<p>In this example, the output precision of the square root function is set to 10. It is possible to increase the precision of the output but this will increase the utilization of logic cells. See <i><a href="/literature/an/an215.pdf">AN 215: Implementing High Performance DSP Functions in Stratix Devices</a> for details</i>.</p><p>For more information on the square root function, please refer to the <a href="/products/ip/ipm-index.html">Altera IP MegaStore<sup>&#153;</sup></a>.</p><p>A license is required in order for this design example to work properly. For more information, please refer to the README file.</p><p>Download the files used in this example:</p><ul><li><a href="/patches/examples/verilog/magnitude.zip">Download magnitude.zip</a><li><a href="../download/magnitude_vlog_readme-v1.0.0p1.txt">Download Magnitude Design Example README file</a></ul><p>Files in the download include:</p><ul><li>magnitude.v - Top-level design file<li>square_numbers.v - Calculates the sum of squares of the input using DSP blocks<li>root_pipeline_wrapper.tdf - Pipelined version of the square root macro</ul><p>Figure 1 shows the Magnitude top-level block diagram.</p><p><b><i>Figure 1. Magnitude Top-Level Block Diagram</i></b></p><p><img src="images/ver-magnitude_fig1.gif" alt="Figure 1. Magnitude Top-Level Block Diagram" width="538" height="194" border="0"></p><p>Table 1 contains a listing of Magnitude design example ports and parameters.</p><table width="100%" border="1" cellspacing="0" cellpadding="2">  <tr>     <td colspan="3"><b><i>Table 1. Magnitude Design Example Port &amp; Parameter       Listing</i></b></td>  </tr>  <tr bgcolor="#000099">     <td><b><font color="#FFFFFF">Port Name</font></b></td>    <td align="center"><b><font color="#FFFFFF">Type</font></b></td>    <td align="center"><b><font color="#FFFFFF">Description</font></b></td>  </tr>  <tr>     <td valign="top"><b>vectorX[8..0]<br>      vectorY[8..0]</b></td>    <td valign="top" align="center">Input</td>    <td valign="top">The input is a 9-bit signed vector</td>  </tr>  <tr>     <td valign="top"><b>clk</b></td>    <td valign="top" align="center">Input</td>    <td valign="top">Clock</td>  </tr>  <tr>     <td valign="top"><b>clken</b></td>    <td valign="top" align="center">Input</td>    <td valign="top">Clock enable</td>  </tr>  <tr>     <td valign="top"><b>aclr</b></td>    <td valign="top" align="center">Input</td>    <td valign="top">Asynchronous clear</td>  </tr>  <tr>     <td valign="top"><b>magnitude[9..0]</b></td>    <td valign="top" align="center">Output</td>    <td valign="top">If clken is high, the function will calculate the magnitude based on the       input vectorX, and vectorY. Otherwise, it will remain idle.</td>  </tr>  <tr bgcolor="#000099">     <td><b><font color="#FFFFFF">Parameter</font></b></td>    <td align="center"><b><font color="#FFFFFF">Type</font></b></td>    <td align="center"><b><font color="#FFFFFF">Description</font></b></td>  </tr>  <tr>     <td valign="top"><b>IN_PREC</b></td>    <td valign="top" align="center">Integer</td>    <td valign="top">Input bit precision feeding into the square root macro</td>  </tr>  <tr>     <td valign="top"><b>OUT_PREC</b></td>    <td valign="top" align="center">Integer</td>    <td valign="top">Output bit precision from the square root macro</td>  </tr>  <tr>     <td valign="top"><b>PIPELINE</b></td>    <td valign="top" align="center">String</td>    <td valign="top">This parameter controls the architecture of the square root macro. If       set to &quot;YES&quot;, it includes pipeline stages in the square root macro.       If set to &quot;NO&quot;, the square root macro becomes a single-cycle combinatorial       function.</td>  </tr></table><br><HR noshade><p>For more information on using this example, go to:</p><ul><li><a href="verilog.html">How to Use Verilog HDL Examples</a><li><a href="/literature/an/an215.pdf"><i>AN 215: Implementing High Performance DSP Functions in Stratix Devices</i></a></ul><HR noshade><h2>Feedback</h2><p>Did this information help you?</p><p>If no, please log onto <a href="https://mysupport.altera.com/eservice/">mySupport</a> to file a technical request or enhancement.</p><p><hr noshade><p></p><font size="-1">Altera does not warrant that this solution will work for the customer's intended purpose and disclaims all liability for use of or reliance on the solution.</font><!-- end content --><!--stopindex-->		<p>&nbsp;</p>    </td>	<td rowspan="3" width="15"><img src="/common/template/spacer.gif" width="15" height="15" alt="" border="0"></td>	</tr>  <tr valign="top">     <td bgcolor="#e0e0e0" valign="top" width="161"> 	&nbsp;	</td></tr><tr> 	<td bgcolor=#e0e0e0 valign="bottom" width="161" height="2">       <p class="footer">	  <br>&nbsp;&nbsp;Contact Us<br>		&nbsp;&nbsp;<a href="/corporate/contact/info/con-feedback_form.jsp">Please Give Us Feedback</a><br>		&nbsp;&nbsp;<a href="/corporate/contact/signup/con-signup.jsp">Sign Up for E-mail Updates</a></p>	</td></tr><!-- Footer Information --> <tr><td bgcolor="#0182C4" colspan="4" align="right"><img src="/common/template/footer_user.gif" width="761" height="18" usemap="#footer_user" border="0" alt="footer"><map name="footer_user"><area shape="rect" coords="521,3,578,16" href="/common/new_user.html" alt="New User to the Altera Web Site" title="New User to the Altera Web Site"><area shape="rect" coords="587,4,631,15" href="/common/sitemap.html" alt="Altera Site Map" title="Altera Site Map"><area shape="rect" coords="643,3,684,14" href="/common/privacy.html" alt="Altera Privacy Policy" title="Altera Privacy Policy"><area shape="rect" coords="690,3,757,14" href="/common/legal.html" alt="Altera Legal Notice" title="Altera Legal Notice"></map></td> </tr><tr>	<td width="161">&nbsp;</td>	<td colspan="3" width="100%"class="footer"><br><!-- begin top level navigation (bottom) --><a href=/index.jsp>Home</a>&nbsp;|&nbsp;<a href=/products/prd-index.html>Products</a>&nbsp;|&nbsp;<a href=/support/spt-index.html>Support</a>&nbsp;|&nbsp;<a href=/solutions/sln-index.html>System Solutions</a>&nbsp;|&nbsp;<a href=/education/edu-index.html>Education & Events</a>&nbsp;|&nbsp;<a href=http://buy.altera.com/ecommerce/>Buy On-Line</a>&nbsp;|&nbsp;<a href=/corporate/crp-index.html>Corporate</a><br><!-- end top level navigation (bottom) --> <!-- begin second level navigation (bottom) --><a href=/mysupport >mySupport</a>&nbsp;|&nbsp;<a href=/support/kdb/spt-search_kdb.html>Knowledge Database</a>&nbsp;|&nbsp;<a href=/support/software/sof-index.html>Software</a>&nbsp;|&nbsp;<a href=/support/devices/dvs-index.html>Devices</a>&nbsp;|&nbsp;<a href=/support/examples/exm-index.html>Design Examples</a><br><!-- end second level navigation (bottom) -->		<p class="footer">Copyright &copy; 1995 - 2002 Altera Corporation, 101 Innovation Drive, San Jose, California 95134, USA.</p>		</td>	</tr>	</table>	</td></tr></table><!--startindex--></body></html>

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