ila_pro_0.edn

SDRAM读写控制的实现与Modelsim仿真

                   (port (rename ADDRB_7_ "ADDRB<7>") (direction INPUT))
                   (port (rename ADDRB_8_ "ADDRB<8>") (direction INPUT))
                   (port (rename ADDRB_9_ "ADDRB<9>") (direction INPUT))
                   (port (rename ADDRB_10_ "ADDRB<10>") (direction INPUT))
                   (port (rename DIPB_0_ "DIPB<0>") (direction INPUT))
                   (port (rename DOPB_0_ "DOPB<0>") (direction OUTPUT))
               )
           )
       )
       (cell SRL16 (cellType GENERIC)
           (view view_1 (viewType NETLIST)
               (interface
                   (port D (direction INPUT))
                   (port CLK (direction INPUT))
                   (port A0 (direction INPUT))
                   (port A1 (direction INPUT))
                   (port A2 (direction INPUT))
                   (port A3 (direction INPUT))
                   (port Q (direction OUTPUT))
               )
           )
       )
       (cell SRL16E (cellType GENERIC)
           (view view_1 (viewType NETLIST)
               (interface
                   (port D (direction INPUT))
                   (port CE (direction INPUT))
                   (port CLK (direction INPUT))
                   (port A0 (direction INPUT))
                   (port A1 (direction INPUT))
                   (port A2 (direction INPUT))
                   (port A3 (direction INPUT))
                   (port Q (direction OUTPUT))
               )
           )
       )
       (cell SRLC16E (cellType GENERIC)
           (view view_1 (viewType NETLIST)
               (interface
                   (port D (direction INPUT))
                   (port CE (direction INPUT))
                   (port CLK (direction INPUT))
                   (port A0 (direction INPUT))
                   (port A1 (direction INPUT))
                   (port A2 (direction INPUT))
                   (port A3 (direction INPUT))
                   (port Q (direction OUTPUT))
                   (port Q15 (direction OUTPUT))
               )
           )
       )
       (cell XORCY (cellType GENERIC)
           (view view_1 (viewType NETLIST)
               (interface
                   (port LI (direction INPUT))
                   (port CI (direction INPUT))
                   (port O (direction OUTPUT))
               )
           )
       )
   )
(library test_lib (edifLevel 0) (technology (numberDefinition (scale 1 (E 1 -12) (unit Time))))
(cell ila_pro_0
 (cellType GENERIC) (view view_1 (viewType NETLIST)
  (interface
   (port ( rename clk "clk") (direction INPUT))
   (port ( rename data_32_ "data<32>") (direction INPUT))
   (port ( rename data_31_ "data<31>") (direction INPUT))
   (port ( rename data_30_ "data<30>") (direction INPUT))
   (port ( rename data_29_ "data<29>") (direction INPUT))
   (port ( rename data_28_ "data<28>") (direction INPUT))
   (port ( rename data_27_ "data<27>") (direction INPUT))
   (port ( rename data_26_ "data<26>") (direction INPUT))
   (port ( rename data_25_ "data<25>") (direction INPUT))
   (port ( rename data_24_ "data<24>") (direction INPUT))
   (port ( rename data_23_ "data<23>") (direction INPUT))
   (port ( rename data_22_ "data<22>") (direction INPUT))
   (port ( rename data_21_ "data<21>") (direction INPUT))
   (port ( rename data_20_ "data<20>") (direction INPUT))
   (port ( rename data_19_ "data<19>") (direction INPUT))
   (port ( rename data_18_ "data<18>") (direction INPUT))
   (port ( rename data_17_ "data<17>") (direction INPUT))
   (port ( rename data_16_ "data<16>") (direction INPUT))
   (port ( rename data_15_ "data<15>") (direction INPUT))
   (port ( rename data_14_ "data<14>") (direction INPUT))
   (port ( rename data_13_ "data<13>") (direction INPUT))
   (port ( rename data_12_ "data<12>") (direction INPUT))
   (port ( rename data_11_ "data<11>") (direction INPUT))
   (port ( rename data_10_ "data<10>") (direction INPUT))
   (port ( rename data_9_ "data<9>") (direction INPUT))
   (port ( rename data_8_ "data<8>") (direction INPUT))
   (port ( rename data_7_ "data<7>") (direction INPUT))
   (port ( rename data_6_ "data<6>") (direction INPUT))
   (port ( rename data_5_ "data<5>") (direction INPUT))
   (port ( rename data_4_ "data<4>") (direction INPUT))
   (port ( rename data_3_ "data<3>") (direction INPUT))
   (port ( rename data_2_ "data<2>") (direction INPUT))
   (port ( rename data_1_ "data<1>") (direction INPUT))
   (port ( rename data_0_ "data<0>") (direction INPUT))
   (port ( rename trig0_5_ "trig0<5>") (direction INPUT))
   (port ( rename trig0_4_ "trig0<4>") (direction INPUT))
   (port ( rename trig0_3_ "trig0<3>") (direction INPUT))
   (port ( rename trig0_2_ "trig0<2>") (direction INPUT))
   (port ( rename trig0_1_ "trig0<1>") (direction INPUT))
   (port ( rename trig0_0_ "trig0<0>") (direction INPUT))
   (port ( rename control_35_ "control<35>") (direction INOUT))
   (port ( rename control_34_ "control<34>") (direction INOUT))
   (port ( rename control_33_ "control<33>") (direction INOUT))
   (port ( rename control_32_ "control<32>") (direction INOUT))
   (port ( rename control_31_ "control<31>") (direction INOUT))
   (port ( rename control_30_ "control<30>") (direction INOUT))
   (port ( rename control_29_ "control<29>") (direction INOUT))
   (port ( rename control_28_ "control<28>") (direction INOUT))
   (port ( rename control_27_ "control<27>") (direction INOUT))
   (port ( rename control_26_ "control<26>") (direction INOUT))
   (port ( rename control_25_ "control<25>") (direction INOUT))
   (port ( rename control_24_ "control<24>") (direction INOUT))
   (port ( rename control_23_ "control<23>") (direction INOUT))
   (port ( rename control_22_ "control<22>") (direction INOUT))
   (port ( rename control_21_ "control<21>") (direction INOUT))
   (port ( rename control_20_ "control<20>") (direction INOUT))
   (port ( rename control_19_ "control<19>") (direction INOUT))
   (port ( rename control_18_ "control<18>") (direction INOUT))
   (port ( rename control_17_ "control<17>") (direction INOUT))
   (port ( rename control_16_ "control<16>") (direction INOUT))
   (port ( rename control_15_ "control<15>") (direction INOUT))
   (port ( rename control_14_ "control<14>") (direction INOUT))
   (port ( rename control_13_ "control<13>") (direction INOUT))
   (port ( rename control_12_ "control<12>") (direction INOUT))
   (port ( rename control_11_ "control<11>") (direction INOUT))
   (port ( rename control_10_ "control<10>") (direction INOUT))
   (port ( rename control_9_ "control<9>") (direction INOUT))
   (port ( rename control_8_ "control<8>") (direction INOUT))
   (port ( rename control_7_ "control<7>") (direction INOUT))
   (port ( rename control_6_ "control<6>") (direction INOUT))
   (port ( rename control_5_ "control<5>") (direction INOUT))
   (port ( rename control_4_ "control<4>") (direction INOUT))
   (port ( rename control_3_ "control<3>") (direction INOUT))
   (port ( rename control_2_ "control<2>") (direction INOUT))
   (port ( rename control_1_ "control<1>") (direction INOUT))
   (port ( rename control_0_ "control<0>") (direction INOUT))
   )
  (contents
   (instance VCC (viewRef view_1 (cellRef VCC  (libraryRef xilinxun))))
   (instance GND (viewRef view_1 (cellRef GND  (libraryRef xilinxun))))
   (instance (rename ila_pro_0_i_tq0_g_tw_0_u_tq "ila_pro_0/i_tq0/g_tw/0/u_tq")
      (viewRef view_1 (cellRef FDP (libraryRef xilinxun)))
   )
   (instance (rename ila_pro_0_i_tq0_g_tw_1_u_tq "ila_pro_0/i_tq0/g_tw/1/u_tq")
      (viewRef view_1 (cellRef FDP (libraryRef xilinxun)))
   )
   (instance (rename ila_pro_0_i_tq0_g_tw_2_u_tq "ila_pro_0/i_tq0/g_tw/2/u_tq")
      (viewRef view_1 (cellRef FDP (libraryRef xilinxun)))
   )
   (instance (rename ila_pro_0_i_tq0_g_tw_3_u_tq "ila_pro_0/i_tq0/g_tw/3/u_tq")
      (viewRef view_1 (cellRef FDP (libraryRef xilinxun)))
   )
   (instance (rename ila_pro_0_i_tq0_g_tw_4_u_tq "ila_pro_0/i_tq0/g_tw/4/u_tq")
      (viewRef view_1 (cellRef FDP (libraryRef xilinxun)))
   )
   (instance (rename ila_pro_0_i_tq0_g_tw_5_u_tq "ila_pro_0/i_tq0/g_tw/5/u_tq")
      (viewRef view_1 (cellRef FDP (libraryRef xilinxun)))
   )
   (instance (rename ila_pro_0_i_dq_g_dw_0_u_dq "ila_pro_0/i_dq/g_dw/0/u_dq")
      (viewRef view_1 (cellRef FDP (libraryRef xilinxun)))
   )
   (instance (rename ila_pro_0_i_dq_g_dw_1_u_dq "ila_pro_0/i_dq/g_dw/1/u_dq")
      (viewRef view_1 (cellRef FDP (libraryRef xilinxun)))
   )
   (instance (rename ila_pro_0_i_dq_g_dw_2_u_dq "ila_pro_0/i_dq/g_dw/2/u_dq")
      (viewRef view_1 (cellRef FDP (libraryRef xilinxun)))
   )
   (instance (rename ila_pro_0_i_dq_g_dw_3_u_dq "ila_pro_0/i_dq/g_dw/3/u_dq")
      (viewRef view_1 (cellRef FDP (libraryRef xilinxun)))
   )
   (instance (rename ila_pro_0_i_dq_g_dw_4_u_dq "ila_pro_0/i_dq/g_dw/4/u_dq")
      (viewRef view_1 (cellRef FDP (libraryRef xilinxun)))
   )
   (instance (rename ila_pro_0_i_dq_g_dw_5_u_dq "ila_pro_0/i_dq/g_dw/5/u_dq")
      (viewRef view_1 (cellRef FDP (libraryRef xilinxun)))
   )
   (instance (rename ila_pro_0_i_dq_g_dw_6_u_dq "ila_pro_0/i_dq/g_dw/6/u_dq")
      (viewRef view_1 (cellRef FDP (libraryRef xilinxun)))
   )
   (instance (rename ila_pro_0_i_dq_g_dw_7_u_dq "ila_pro_0/i_dq/g_dw/7/u_dq")
      (viewRef view_1 (cellRef FDP (libraryRef xilinxun)))
   )
   (instance (rename ila_pro_0_i_dq_g_dw_8_u_dq "ila_pro_0/i_dq/g_dw/8/u_dq")
      (viewRef view_1 (cellRef FDP (libraryRef xilinxun)))
   )
   (instance (rename ila_pro_0_i_dq_g_dw_9_u_dq "ila_pro_0/i_dq/g_dw/9/u_dq")
      (viewRef view_1 (cellRef FDP (libraryRef xilinxun)))
   )
   (instance (rename ila_pro_0_i_dq_g_dw_10_u_dq "ila_pro_0/i_dq/g_dw/10/u_dq")
      (viewRef view_1 (cellRef FDP (libraryRef xilinxun)))
   )
   (instance (rename ila_pro_0_i_dq_g_dw_11_u_dq "ila_pro_0/i_dq/g_dw/11/u_dq")
      (viewRef view_1 (cellRef FDP (libraryRef xilinxun)))
   )
   (instance (rename ila_pro_0_i_dq_g_dw_12_u_dq "ila_pro_0/i_dq/g_dw/12/u_dq")
      (viewRef view_1 (cellRef FDP (libraryRef xilinxun)))
   )
   (instance (rename ila_pro_0_i_dq_g_dw_13_u_dq "ila_pro_0/i_dq/g_dw/13/u_dq")
      (viewRef view_1 (cellRef FDP (libraryRef xilinxun)))
   )
   (instance (rename ila_pro_0_i_dq_g_dw_14_u_dq "ila_pro_0/i_dq/g_dw/14/u_dq")
      (viewRef view_1 (cellRef FDP (libraryRef xilinxun)))
   )
   (instance (rename ila_pro_0_i_dq_g_dw_15_u_dq "ila_pro_0/i_dq/g_dw/15/u_dq")
      (viewRef view_1 (cellRef FDP (libraryRef xilinxun)))
   )
   (instance (rename ila_pro_0_i_dq_g_dw_16_u_dq "ila_pro_0/i_dq/g_dw/16/u_dq")
      (viewRef view_1 (cellRef FDP (libraryRef xilinxun)))
   )
   (instance (rename ila_pro_0_i_dq_g_dw_17_u_dq "ila_pro_0/i_dq/g_dw/17/u_dq")
      (viewRef view_1 (cellRef FDP (libraryRef xilinxun)))
   )
   (instance (rename ila_pro_0_i_dq_g_dw_18_u_dq "ila_pro_0/i_dq/g_dw/18/u_dq")
      (viewRef view_1 (cellRef FDP (libraryRef xilinxun)))
   )
   (instance (rename ila_pro_0_i_dq_g_dw_19_u_dq "ila_pro_0/i_dq/g_dw/19/u_dq")
      (viewRef view_1 (cellRef FDP (libraryRef xilinxun)))
   )
   (instance (rename ila_pro_0_i_dq_g_dw_20_u_dq "ila_pro_0/i_dq/g_dw/20/u_dq")
      (viewRef view_1 (cellRef FDP (libraryRef xilinxun)))
   )
   (instance (rename ila_pro_0_i_dq_g_dw_21_u_dq "ila_pro_0/i_dq/g_dw/21/u_dq")
      (viewRef view_1 (cellRef FDP (libraryRef xilinxun)))
   )
   (instance (rename ila_pro_0_i_dq_g_dw_22_u_dq "ila_pro_0/i_dq/g_dw/22/u_dq")
      (viewRef view_1 (cellRef FDP (libraryRef xilinxun)))
   )