uart.fit.summary

来自「一个串口的完整FPGA工程」· SUMMARY 代码 · 共 13 行

Fitter Status : Successful - Thu May 07 23:21:52 2009
Quartus II Version : 7.2 Build 151 09/26/2007 SJ Full Version
Revision Name : uart
Top-level Entity Name : top
Family : Cyclone
Device : EP1C3T144C8
Timing Models : Final
Total logic elements : 215 / 2,910 ( 7 % )
Total pins : 25 / 104 ( 24 % )
Total virtual pins : 0
Total memory bits : 0 / 59,904 ( 0 % )
Total PLLs : 0 / 1 ( 0 % )