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几个VHDL的源代码和和一个本人编写的5级流水线RISC CPU的代码

# Reading D:/Modeltech_5.6/tcl/vsim/pref.tcl 
# vsim {C:\Documents and Settings\administrator\Desktop\靳?－毕?设计32?5级流?线RISC CPU\靳?－?程序\alu.vhd} 
# ** Error: (vsim-19) Failed to access library 'work' at "work".
# No such file or directory.
# Error loading design