ddr_sdram.tcl

用VHDL编写DDR SDRAM Controller的源代码

cmp add_assignment "" "" "" ROOT "|ddr_sdram"
cmp add_assignment "" "" "" FAMILY "APEX20KE"
cmp add_assignment "ddr_sdram" "" "" DEVICE "EP20K400EFC672-1X"
project add_assignment "" "ddr_sdram" "" "" "EDA_DESIGN_ENTRY_SYNTHESIS_TOOL" "SYNPLIFY"
project add_assignment "" "eda_design_synthesis" "" "" "EDA_USE_LMF" "synplcty.lmf"