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x_or2.vhd
library ieee;
use ieee.std_logic_1164.all;
entity x_or2 is
port (
in1 : in bit ;
in2 : in bit ;
out1 : out bit) ;
end x_or2;
entity and_gate is
port (
a : in bit ;
b : in bit ;
c :
x_or1.vhd
---------------二输入或门程序模块（行为级）--------------
library ieee;
use ieee.std_logic_1164.all;
entity x_or1 is
port (
in1 : in bit ;
in2 : in bit ;
out1 : out bit) ;
end x_or1;
architecture behavior
240x.h
;*************************************************************
; File Name: 240x.h
;
; Description: 240x Peripheral Registers + other useful definitions
;
;=======================================
x86.h
// Routines to let C code use special x86 instructions.
static inline uchar
inb(ushort port)
{
uchar data;
asm volatile("in %1,%0" : "=a" (data) : "d" (port));
return data;
}
static inline vo
x_fnct.m
function y=x_fnct(x,funfcn,p1,p2,p3)
% y=x_fnct(x,funfcn,p1,p2,p3)
% Returns the function funfcn(x) times x
args=[];
for nn=1:nargin-2
args=[args,',p',int2str(nn)];
end
args=[args,')'] ;