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startup.s
/***********************************************************************/
/* This file is part of the uVision/ARM development tools */
/* Copyright KEIL ELEKTRONIK GmbH 2002-2005
startup.s
;/*****************************************************************************/
;/* STARTUP.S: Startup file for Philips LPC2000 */
;/**********************************
memcfg.s
;**********MEMORY CONTROL PARAMETERS*******************************
;When MCLK=66MHz,1clk=0.0152us=15.2ns
;Bank 0 parameter for Monitor Rom
GBLS BDRAMTYPE
BDRAMTYPE SETS "SDR
option.s
;**********OPTIONS*******************************
;_RAM_STARTADDRESS EQU 0xc000000
_ISR_STARTADDRESS EQU 0xc7fff00 ;GCS6:64M DRAM/SDRAM
;_ISR_STARTADDRESS EQU 0xc1fff00 ;GCS6:16M DRAM
head.s
.global _start
.include "init.inc"
@ the mini_boot start here!
_start:
@ Exception vector table
@ 0x00 Reset Supervisor
b reset
@ 0x04 Undefined instruction
b .
@ 0x08 Software Interrupt
b .
@ 0x0
nmiexceptionvector.s
// NMIExceptionVector.S -- Standalone NMI Interrupt Vector/Handler
// $Id: //depot/rel/BearValley/Xtensa/OS/xtos/NMIExceptionVector.S#1 $
// Customer ID=4654; Build=0x116b0; Copyright (c) 2003 b
debugexceptionvector.s
// DebugExceptionVector.S -- Debug Exception Handler Vector
// $Id: //depot/rel/BearValley/Xtensa/OS/xtos/DebugExceptionVector.S#1 $
// Customer ID=4654; Build=0x116b0; Copyright (c) 2003 by Ten
debugexceptionvectorhandler.s
/*
* DebugExceptionVectorHandler.S -- Debug Exception Handler
*/
/* $Id $ */
/*
* Customer ID=4654; Build=0x116b0; Copyright (c) 2004 by Tensilica Inc. ALL RIGHTS RESERVED.
* These coded in
userv.s
/* userv.S -- User Vector
*
* This code is taken from example code in the Xtensa Microprocessor
* Programmer's Guide.
*
* WARNING: It is highly unlikely that this code works as is on your
* par