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// // Copyright (c) 2002 Xilinx, Inc. All rights reserved. // Xilinx, Inc. // // XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A // COURTESY TO YOU. BY PROVIDING THIS DESIGN, C

.module RTC.C .area data(ram, con, rel) _Table:: .blkb 2 .area idata .byte 63,6 .area data(ram, con, rel) .blkb 2 .area idata .byte 91,'O .area data(ram, con, rel) .blkb 2 .are

.module wwork.c .area text(rom, con, rel) .dbfile E:\张军\AVR\光盘内容\实例源文件\第七章工程\wwork.c .dbfunc e IO_Init _IO_Init fV .even _IO_Init:: .dbline -1 .dbline 54 ; //**********************FileN

.module work.c .area text(rom, con, rel) .dbfile C:\DOCUME~1\Administrator\桌面\张军\AVR\AVR单片机系统开发实例稿\第七章\第七章工程\work.c .dbfunc e IO_Init _IO_Init fV .even _IO_Init:: .dbline -1 .dbline 54

.module Motor.c .area data(ram, con, rel) _Ek:: .blkb 2 .area idata .word 0 .area data(ram, con, rel) .dbfile E:\张军\AVR\光盘内容\实例源文件\第九章工程\Motor.c .dbsym e Ek _Ek I _Ek_1:: .blkb 2

.module sle4442.c .area data(ram, con, rel) _table:: .blkb 2 .area idata .byte 63,6 .area data(ram, con, rel) .blkb 2 .area idata .byte 91,'O .area data(ram, con, rel) .blkb 2

.module SSLE4442.c .area data(ram, con, rel) _table:: .blkb 2 .area idata .byte 63,6 .area data(ram, con, rel) .blkb 2 .area idata .byte 91,'O .area data(ram, con, rel) .blkb 2

.module Robbot.c .area data(ram, con, rel) _sflag:: .blkb 1 .area idata .byte 0 .area data(ram, con, rel) .dbfile H:\第八章源程序\Robbot.c .dbsym e sflag _sflag c _crossflag:: .blkb 1 .

.module UART.C .area data(ram, con, rel) _Table:: .blkb 2 .area idata .byte 63,6 .area data(ram, con, rel) .blkb 2 .area idata .byte 91,'O .area data(ram, con, rel) .blkb 2 .ar

.module Thermometer_ICC.c .area data(ram, con, rel) _Table:: .blkb 2 .area idata .byte 63,6 .area data(ram, con, rel) .blkb 2 .area idata .byte 91,'O .area data(ram, con, rel) .b