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r2r.hif
HIF003
--
-- Copyright (C) 1988-2002 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, an
r2r.vhd
-- MAX+plus II VHDL Template
-- Clearable flipflop with enable
LIBRARY ieee;
USE ieee.std_logic_1164.all;
ENTITY R2R IS
PORT
(
data : in std_logic_vector(7 downto 0);
dataout, q
r2r.pin
-- Copyright (C) 1988-2002 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
r2r.acf
--
-- Copyright (C) 1988-2002 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any
r2r.fit
-- MAX+plus II Compiler Fit File
-- Version 10.2 07/10/2002
-- Compiled: 05/26/2007 00:24:09
-- Copyright (C) 1988-2002 Altera Corporation
-- Any megafunction design, and
r2r.hex
:020000040000FA
:2B000000FFFF62FF2500FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF76
:2B002B0060188661189661189661188665188665188601000000001886611886C11D8661F0866118866
ref_r-r.htm
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