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ch1_1_1.hex
:020000040000FA
:2B000000FFFF62FF2500FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF76
:2B002B0060<mark>1</mark>8866<mark>1</mark><mark>1</mark>8866<mark>1</mark><mark>1</mark>8866<mark>1</mark><mark>1</mark>8866<mark>1</mark><mark>1</mark>8866<mark>1</mark><mark>1</mark>8860<mark>1</mark>00000000<mark>1</mark>8866<mark>1</mark><mark>1</mark>8866<mark>1</mark><mark>1</ma ...
ch1_1_1.pin
-- Copyright (C) 1988-1999 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
ch1_1_1.ndb
NDB006
The number of symbol table entries is: 1
The length of the symbol table is: 13
Index Hierarchy Path
----- --------------
! &null_hpath&
The number of name info structs is : 3
InsOr
ch1_1_1.rpt
Project Information d:\lu\vhdl-digitallogic\disk\ch1\ch1_1_1.rpt
MAX+plus II Compiler Report File
Version 9.23 3/19/99
Compiled: 06/04/2000 11:28:31
Copyright (C) 1988-1999 Alter
ch1_1_1.acf
--
-- Copyright (C) 1988-1999 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any
ch1_1_1.vhd
-- ********************************************
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
--*************************************
content-1-1-1.htm
Untitled Document
content-1-1-1.htm
vti_encoding:SR|utf8-nl
vti_timelastmodified:TR|24 Feb 2005 07:46:21 -0000
vti_extenderversion:SR|4.0.2.6513
vti_backlinkinfo:VX|content-1-1.htm content-2-0.htm contentframe-mulu.htm
vti_filesize: