We propose and analyze several timestamping of an MPEG-2 Transport Stream transmitted strategies for performing over a packet-switched network using the PCR-unaware encapsulation scheme, and analyze their effect on the quality of the recovered clock at the MPEG-2 Systems decoder.
标签： timestamping transmitted strategies Transport
上传时间： 2014-12-05
上传用户：450976175
Silicon Motion, Inc. has made best efforts to ensure that the information contained in this document is accurate andreliable. However, the information is subject to change without notice. No responsibility is assumed by SiliconMotion, Inc. for the use of this information, nor for infringements of patents or other rights of third parties.Copyright NoticeCopyright 2002, Silicon Motion, Inc. All rights reserved. No part of this publication may be reproduced, photocopied,or transmitted in any form, without the prior written consent of Silicon Motion, Inc. Silicon Motion, Inc. reserves theright to make changes to the product specification without reservation and without notice to our users
标签： GUIDELINES LAYOUT 320 PCB
上传时间： 2014-12-23
上传用户：zhaistone
The MAX9257/MAX9258 programmable serializer/deserializer (SerDes) devices transfer both video data and control signals over the same twisted-pair cable. However, control data can only be transmitted during the vertical blank time, which is indicated by the control-channel-enabled output (CCEN) signal. The electronic control unit (ECU) firmware designer needs to know how quickly to respond to the CCEN signal before it times out and how to calculate this duration. This application note describes how to calculate the duration of the CCEN for the MAX9257/MAX9258 SerDes chipset. The calculation is based on STO timeout, clock frequency, and UART bit timing. The CCEN duration is programmable and can be closed if not in use.
上传时间： 2014-01-24
上传用户：xingisme
在航电系统维护过程中，为解决定位故障的效率和降低维修成本等问题，提出了基于ICD（Interface Control Document，接口控制文件）的1553B总线的信息监控系统模型。该系统运用数据采集卡对总线中传输的信号有无失真、偏差等电气特性进行检测，并使用1553B通讯卡通过测控软件LabWindows/CVI编程与ICD数据库的动态链接，实现总线信息的解析和故障的判断。与传统的维护过程相比，这种模型能够从信号的电气特性以及信息的解析等全方位的去检测判断故障的来源，并且能够广泛在其他1553B总线系统内扩展应用。验证表明该监控系统可以对总线信息进行快速有效地监测分析，能满足应用需求。 Abstract: In the process of avionics system maintenance， to solve the problems such as improving the efficiency of fast orientation to troubles and reducing maintenance cost， system of 1553B bus information monitor model based on ICD was proposed. The system observed whether the data which transmitted on the bus appear distortion and deviation by using data acquisition card. And using 1553B communication card programming of the measure software LabWindows/CVI and the dynamic linking of ICD database， message analysis and fault estimation could be realized. Compared with traditional maintenance， this model can all-dimensionally detect and analyze the source of faults from both electrical characteristics of the signal and message analysis， and it can be widely applied in the other 1553B system. Experiment shown that this monitor system can effectively detect and analyze the bus message and can meet the application requirements.
上传时间： 2013-11-23
上传用户：18752787361
以C8051F020为核心处理器，设计无线传感器网络数据采集系统。系统采用SZ05-ADV型无线通讯模块组建Zigbee无线网络，结合嵌入式系统的软硬件技术，完成终端节点的8路传感器信号的数据采集。现场8路信号通过前端处理后，分别送入C8051F020的12位A/D转换器进行转换。经过精确处理、存储后的现场数据，通过Zigbee无线网络传送到上位机，系统可达到汽车试验中无线测试的目的。 Abstract: This paper designs a wireless sensor network system for data acquisition with C8051F020 as core processors.The system used SZ05-ADV wireless communication module，set up a Zigbee wireless network， combined with hardware and software technologies of embedded systems，completed the end-node 8-locale sensor signal data acquisition.Eight locale signals were sent separately into the 12-bit ADC of C8051F020 for conversion through front treatment.After accurate processing and storage，the locale data was transmitted to the host computer through Zigbee wireless.The system achieves the purpose of wireless testing in vehicle trial.
标签： C8051F020 Zigbee 汽车测试 系统设计
上传时间： 2013-11-23
上传用户：dsgkjgkjg
介绍一种基于C8051单片机的动态心电监护系统。该系统由两部分组成：以C8051F320单片机为核心的数据采集装置和以PC机为平台的分析处理系统。硬件电路功耗低，由单片机自带的USB接口将数据传送给PC机。软件平台采用LabVIEW可视化虚拟仪器系统开发平台，将传统仪器的功能模块集成到计算机中，用户可通过修改虚拟仪器的程序改变其功能。采用USB接口实时传输心电数据，并将数据采集模块设计为计算机外设，使该系统高速快捷、小巧便携。 Abstract: In this design，a low-cost ECG electrocardiogram monitoring system is introduced，which consists of two parts:data acquisition device based on C8051F320and PC terminal as the analysis and processing system.The system is low-power consumption，the data is transmitted to the PC terminal by USB interface of the C8051F320.By using the visible virtual instrument system developing platform LabVIEW，the traditional instruments function modules are integrated into the computer，so the user can modify virtual instrument software to change its function to meet their needs.Using USB in-terface to realize real-time ECG data transmission，in addition，ECG data acquisition module is designed as the computer peripheral，which makes the syetem high-speed and portable.
上传时间： 2013-11-13
上传用户：zhangzhenyu
Information in this document is subject to change without notice and does notrepresent a commitment on the part of the manufacturer. The software describedin this document is furnished under license agreement or nondisclosureagreement and may be used or copied only in accordance with the terms of theagreement. It is against the law to copy the software on any medium except asspecifically allowed in the license or nondisclosure agreement. The purchasermay make one copy of the software for backup purposes. No part of this manualmay be reproduced or transmitted in any form or by any means, electronic ormechanical, including photocopying, recording, or information storage andretrieval systems, for any purpose other than for the purchaser’s personal use,without written permission.
上传时间： 2014-12-26
上传用户：Tracey
同步技术是跳频通信系统的关键技术之一，尤其是在快速跳频通信系统中，常规跳频通信通过同步字头携带相关码的方法来实现同步，但对于快跳频来说，由于是一跳或者多跳传输一个调制符号，难以携带相关码。对此引入双跳频图案方法，提出了一种适用于快速跳频通信系统的同步方案。采用短码携带同步信息，克服了快速跳频难以携带相关码的困难。分析了同步性能，仿真结果表明该方案同步时间短、虚警概率低、捕获概率高，同步性能可靠。 Abstract: Synchronization is one of the key techniques to frequency-hopping communication system， especially in the fast frequency hopping communication system. In conventional frequency hopping communication systems， synchronization can be achieved by synchronization-head which can be used to carry the synchronization information， but for the fast frequency hopping， Because modulation symbol is transmitted by per hop or multi-hop， it is difficult to carry the correlation code. For the limitation of fast frequency hopping in carrying correlation code， a fast frequency-hopping synchronization scheme with two hopping patterns is proposed. The synchronization information is carried by short code， which overcomes the difficulty of correlation code transmission in fast frequency-hopping. The performance of the scheme is analyzed， and simulation results show that the scheme has the advantages of shorter synchronization time， lower probability of false alarm， higher probability of capture and more reliable of synchronization.
上传时间： 2013-11-23
上传用户：mpquest
Silicon Motion, Inc. has made best efforts to ensure that the information contained in this document is accurate andreliable. However, the information is subject to change without notice. No responsibility is assumed by SiliconMotion, Inc. for the use of this information, nor for infringements of patents or other rights of third parties.Copyright NoticeCopyright 2002, Silicon Motion, Inc. All rights reserved. No part of this publication may be reproduced, photocopied,or transmitted in any form, without the prior written consent of Silicon Motion, Inc. Silicon Motion, Inc. reserves theright to make changes to the product specification without reservation and without notice to our users
标签： GUIDELINES LAYOUT 320 PCB
上传时间： 2013-10-10
上传用户：manga135
The data plane of the reference design consists of a configurable multi-channel XBERT modulethat generates and checks high-speed serial data transmitted and received by the MGTs. Eachchannel in the XBERT module consists of two MGTs (MGTA and MGTB), which physicallyoccupy one MGT tile in the Virtex-4 FPGA. Each MGT has its own pattern checker, but bothMGTs in a channel share the same pattern generator. Each channel can load a differentpattern. The MGT serial rate depends on the reference clock frequency and the internal PMAdivider settings. The reference design can be scaled anywhere from one channel (two MGTs)to twelve channels (twenty-four MGTs).
上传时间： 2013-12-25
上传用户：jkhjkh1982
