Model for Opnet. Use this model to generate traffic between source and destination pairs. The resul
Model for Opnet. Use this model to generate traffic between source and destination pairs. The resul...
traffic技术资料
资源总数：41
traffic全部资料 (41个)
Performance Comparison of Two On-Demand Routing Protocols Depends on Traffic Density by Using UWB-IR
Performance Comparison of Two On-Demand Routing Protocols Depends on Traffic Density by Using UWB-IR...
This program is a simple Traffic Light Controller. Between start time and end time the system contro
This program is a simple Traffic Light Controller. Between start time and end time the system contro...
Traffic sign shape classification based on Support Vector Machines and the FFT of the signature of b
Traffic sign shape classification based on Support Vector Machines and the FFT of the signature of b...
it is a verilog code written for traffic light controller will synthesize in xinlix ise 8.2i.i have
it is a verilog code written for traffic light controller will synthesize in xinlix ise 8.2i.i have...
Performance Evaluation in a two lane and four lane traffic environment in case of a highway, urb
Performance Evaluation in a two lane and four lane traffic environment in case of a highway, urb...
The goal of this thesis is the development of traffic engineering rules for cellular packet radio n
The goal of this thesis is the development of traffic engineering rules for cellular packet radio n...
The traffic light is timed and lets cars pass during a specific time period. There is a pedestrial
The traffic light is timed and lets cars pass during a specific time period. There is a pedestrial ...
The main function of the traffic detection system is to examine the speed, the flow, the vehicle typ
The main function of the traffic detection system is to examine the speed, the flow, the vehicle typ...
This is an extension of sign example. You can design your own traffic sign by using Verilog. And the
This is an extension of sign example. You can design your own traffic sign by using Verilog. And the...