synopsys 热门资料

VMM for SystemVerilog中文版 Synopsys推崇SystemVerilog的设计和验证语言 这是一本很好的电子书

a demo script of "carry lookahead adder" for synopsys design compiler

32bits FIFO with synchronizer. pass the synthesis using Synopsys tools

synopsys公司的专家讲解如何用systemverilog写testbence来验证rtl代码

synopsys dc 中文ppt教材，比较详细! 可是SYnopsys公司培训的教材!难得的好东西!对学习Design compiler的人非常有帮助

Advanced ASIC Chip Synthesis Using Synopsys Design Compiler. This second edition of this book describes the advanced concepts and …

synopsys for the students in order to guide them

-- PCI Target Interface Design for XC73144 -- -- Synopsys VHDL Solution using Xilinx XC7000 Library

Synopsys 8051 IP core documentation.

Synopsys的DesignWare库中采用的brentkung高速加法器Verilog源代码生成,附相关文档