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找到约 569 项符合 state-Machine 的查询结果

allegro State Machine Coding Styles for Synthesis

  本文论述了状态机的verilog编码风格,以及不同编码风格的优缺点,Steve Golson's 1994 paper, "State Machine Design Techniques for Verilog and VHDL" [1], is agreat paper on state machine design using Verilog, VHDL and Synopsys tools. Steve's paper alsooffers in-depth background concernin ...
https://www.eeworm.com/dl/allegro/20115.html
下载: 126
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Mentor Design Safe Verilog State Machine(Synplicity)

  One of the strengths of Synplify is the Finite State Machine compiler. This is a powerfulfeature that not only has the ability to automatically detect state machines in the sourcecode, and implement them with either sequential, gray, or one-hot encoding. But alsoperform a reachability ana ...
https://www.eeworm.com/dl/Mentor/21525.html
下载: 141
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可编程逻辑 State Machine Coding Styles for Synthesis

  本文论述了状态机的verilog编码风格,以及不同编码风格的优缺点,Steve Golson's 1994 paper, "State Machine Design Techniques for Verilog and VHDL" [1], is agreat paper on state machine design using Verilog, VHDL and Synopsys tools. Steve's paper alsooffers in-depth background concernin ...
https://www.eeworm.com/dl/kbcluoji/40134.html
下载: 30
查看: 1054

可编程逻辑 Design Safe Verilog State Machine(Synplicity)

  One of the strengths of Synplify is the Finite State Machine compiler. This is a powerfulfeature that not only has the ability to automatically detect state machines in the sourcecode, and implement them with either sequential, gray, or one-hot encoding. But alsoperform a reachability ana ...
https://www.eeworm.com/dl/kbcluoji/40146.html
下载: 20
查看: 1216

VHDL/FPGA/Verilog State.Machine.Coding.Styles.for.Synthesis(状态机

State.Machine.Coding.Styles.for.Synthesis(状态机,英文,VHDL)
https://www.eeworm.com/dl/663/107654.html
下载: 113
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VHDL/FPGA/Verilog -- State machine for reading data from Dallas 1621 -- -- Testsystem for i2c controller

-- State machine for reading data from Dallas 1621 -- -- Testsystem for i2c controller
https://www.eeworm.com/dl/663/170108.html
下载: 176
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VHDL/FPGA/Verilog -- Moore State Machine with explicit state encoding -- dowload from: www.fpga.com.cn & www.pld.com.

-- Moore State Machine with explicit state encoding -- dowload from: www.fpga.com.cn & www.pld.com.cn
https://www.eeworm.com/dl/663/170596.html
下载: 23
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VHDL/FPGA/Verilog 异步复位状态机 -- State Machine with Asynchronous Reset -- dowload from: www.fpga.com.cn & www.pld.com.cn

异步复位状态机 -- State Machine with Asynchronous Reset -- dowload from: www.fpga.com.cn & www.pld.com.cn
https://www.eeworm.com/dl/663/170597.html
下载: 114
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其他嵌入式/单片机内容 a super good method for designing finite state machine

a super good method for designing finite state machine
https://www.eeworm.com/dl/687/178970.html
下载: 120
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中间件编程 state machine working with rtos

state machine working with rtos
https://www.eeworm.com/dl/682/178973.html
下载: 61
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