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standards-based

  • 基于DSP的车载雷达测速系统设计

    针对运行中火车测速运用多普勒效应采用DSP 设计雷达测速系统并阐述了其基本设计思想与工作原理给出系统硬件软件设计结构和原理图改善了原有光电测速精度提高了系统工作稳定性和可靠性经实验证明DSP 采集板工作稳定测速效果好关键词DSP; 雷达测速; 多普勒效应 On Board DSP-Based Radar Speed Measurement System TANG Wei, SUN Zhi-fang, CHEN Quan (Dept.of computer Science,Yangtze University,Jingzhou 434023,China)Abstract: This paper presents a DSP-based train speed measurement by using Doppler radar. The structure of the system is introduced.The hardware and software are also discussed.Key words: DSP; rader speed measurement; doppler principle

    标签: DSP 车载 系统设计 雷达测速

    上传时间: 2013-10-27

    上传用户:003030

  • Analog Solutions for Xilinx FPGAs

    Designing withProgrammable Logicin an Analog WorldProgrammable logic devicesrevolutionized digital design over 25years ago, promising designers a blankchip to design literally any functionand program it in the field. PLDs canbe low-logic density devices that usenonvolatile sea-of-gates cells calledcomplex programmable logic devices(CPLDs) or they can be high-densitydevices based on SRAM look-up tables

    标签: Solutions Analog Xilinx FPGAs

    上传时间: 2013-11-01

    上传用户:a67818601

  • WP151 - Xilinx FPGA的System ACE配置解决方案

    Design techniques for electronic systems areconstantly changing. In industries at the heart of thedigital revolution, this change is especially acute.Functional integration, dramatic increases incomplexity, new standards and protocols, costconstraints, and increased time-to-market pressureshave bolstered both the design challenges and theopportunities to develop modern electronic systems.One trend driving these changes is the increasedintegration of core logic with previously discretefunctions to achieve higher performance and morecompact board designs.

    标签: System Xilinx FPGA 151

    上传时间: 2014-12-28

    上传用户:康郎

  • WP328-FPGA的语音数据融合

      The SDI standards are the predominant standards for uncompressed digital videointerfaces in the broadcast studio and video production center. The first SDI standard,SD-SDI, allowed standard-definition digital video to be transported over the coaxial cableinfrastructure initially installed in studios to carry analog video. Next, HD-SDI wasto support high-definition video. Finally, dual link HD-SDI and 3G-SDIdoubled the bandwidth of HD-SDI to support 1080p (50 Hz and 60 Hz) and other videoformats requiring more bandwidth than HD-SDI provides.

    标签: FPGA 328 WP 语音

    上传时间: 2013-10-08

    上传用户:yjj631

  • WP369可扩展式处理平台-各种嵌入式系统的理想解决方案

    WP369可扩展式处理平台-各种嵌入式系统的理想解决方案 :Delivering unrivaled levels of system performance,flexibility, scalability, and integration to developers,Xilinx's architecture for a new Extensible Processing Platform is optimized for system power, cost, and size. Based on ARM's dual-core Cortex™-A9 MPCore processors and Xilinx’s 28 nm programmable logic,the Extensible Processing Platform takes a processor-centric approach by defining a comprehensive processor system implemented with standard design methods. This approach provides Software Developers a familiar programming environment within an optimized, full featured,powerful, yet low-cost, low-power processing platform.

    标签: 369 WP 扩展式 处理平台

    上传时间: 2013-10-22

    上传用户:685

  • xilinx Zynq-7000 EPP产品简介

    The Xilinx Zynq-7000 Extensible Processing Platform (EPP) redefines the possibilities for embedded systems, giving system and software architects and developers a flexible platform to launch their new solutions and traditional ASIC and ASSP users an alternative that aligns with today’s programmable imperative. The new class of product elegantly combines an industrystandard ARMprocessor-based system with Xilinx 28nm programmable logic—in a single device. The processor boots first, prior to configuration of the programmable logic. This, along with a streamlined workflow, saves time and effort and lets software developers and hardware designers start development simultaneously. 

    标签: xilinx Zynq 7000 EPP

    上传时间: 2013-11-01

    上传用户:dingdingcandy

  • PLD对FPGA数据加密

    SRAM-based FPGAs are non-volatile devices. Upon powerup, They are required to be programmed from an external source. This procedure allows anyone to easily monitor the bit-stream, and clone the device. The problem then becomes how can you effectively protect your intellectual property from others in an architecture where the part is externally programmed?

    标签: FPGA PLD 数据加密

    上传时间: 2013-11-06

    上传用户:wl9454

  • 基于Actel FPGA的VGA显示控制方案

    VGA 是视频图形阵列(Video Graphics Array)的简称,是IBM 于1987 年提出的一个使用模拟信号的图形显示标准。最初的VGA 标准最大只能支持640*480 分辨率的显示器,而为了适应大屏幕的应用,视频电气标准化组织VESA(Video Electronics StandardsAssociation 的简称)将VGA 标准扩展为SVGA 标准,SVGA 标准能够支持更大的分辨率。人们通常所说的VGA 实际上指的就是VESA 制定的SVGA 标准。(1). VGA 接口VGA 采用15 针的接口,用于显示的接口信号主要有5 个:1 个行同步信号、1 个场同步信号以及3 个颜色信号,接口还包含自测试以及地址码信号,一般由不同的制造商定义,主要用来进行测试及支持其它功能。

    标签: Actel FPGA VGA 显示控制

    上传时间: 2013-10-27

    上传用户:541657925

  • 基于FPGA+DSP模式的智能相机设计

    针对嵌入式机器视觉系统向独立化、智能化发展的要求,介绍了一种嵌入式视觉系统--智能相机。基于对智能相机体系结构、组成模块和图像采集、传输和处理技术的分析,对国内外的几款智能相机进行比较。综合技术发展现状,提出基于FPGA+DSP模式的硬件平台,并提出智能相机的发展方向。分析结果表明,该系统设计可以实现脱离PC运行,完成图像获取与分析,并作出相应输出。 Abstract:  This paper introduced an embedded vision system-intelligent camera ,which was for embedded machine vision systems to an independent and intelligent development requirements. Intelligent camera architecture, component modules and image acquisition, transmission and processing technology were analyzed. After comparing integrated technology development of several intelligent cameras at home and abroad, the paper proposed the hardware platform based on FPGA+DSP models and made clear direction of development of intelligent cameras. On the analysis of the design, the results indicate that the system can run from the PC independently to complete the image acquisition and analysis and give a corresponding output.

    标签: FPGA DSP 模式 智能相机

    上传时间: 2013-10-24

    上传用户:bvdragon

  • 基于CPLD的QDPSK调制解调电路设计

    为了在CDMA系统中更好地应用QDPSK数字调制方式,在分析四相相对移相(QDPSK)信号调制解调原理的基础上,设计了一种QDPSK调制解调电路,它包括串并转换、差分编码、四相载波产生和选相、相干解调、差分译码和并串转换电路。在MAX+PLUSⅡ软件平台上,进行了编译和波形仿真。综合后下载到复杂可编程逻辑器件EPM7128SLC84-15中,测试结果表明,调制电路能正确选相,解调电路输出数据与QDPSK调制输入数据完全一致,达到了预期的设计要求。 Abstract:  In order to realize the better application of digital modulation mode QDPSK in the CDMA system, a sort of QDPSK modulation-demodulation circuit was designed based on the analysis of QDPSK signal modulation-demodulation principles. It included serial/parallel conversion circuit, differential encoding circuit, four-phase carrier wave produced and phase chosen circuit, coherent demodulation circuit, difference decoding circuit and parallel/serial conversion circuit. And it was compiled and simulated on the MAX+PLUSⅡ software platform,and downloaded into the CPLD of EPM7128SLC84-15.The test result shows that the modulation circuit can exactly choose the phase,and the output data of the demodulator circuit is the same as the input data of the QDPSK modulate. The circuit achieves the prospective requirement of the design.

    标签: QDPSK CPLD 调制解调 电路设计

    上传时间: 2014-01-13

    上传用户:qoovoop