scaling pictures.doc
上传时间： 2017-05-17
上传用户：thuyenvinh
The aip file contains few Matlab routines for 1D line scan analysis, 1D scaling, 2D scaling, image brightness or contrast variation routine and rouitne for finding area between zero cossings of 1D times series.
标签： scaling contains analysis routines
上传时间： 2014-01-19
上传用户：xmsmh
Resource scaling Effects on MPP Performance: The STAP Benchmark Implications
标签： Implications Performance Benchmark Resource
上传时间： 2017-06-14
上传用户：star_in_rain
使用DM642 來進行scaling 有說明檔
上传时间： 2014-01-24
上传用户：sxdtlqqjl
Abstract: A digital RF modulator, an integrated solution that satisfies stringent DOCSIS RF-performancerequirements, takes advantage of modern technologies like high-performance wideband digital-to-analogconversion and CMOS technology scaling. This application note describes the concept and advantages ofa digital quadrature amplitude modulation (QAM) modulator that uses the direct-RF architecture to enablea cable access platform (CCAP) system.
上传时间： 2013-10-20
上传用户：drink！
Abstract: Mechanical misalignment and scaling factors lead to a mismatch between the values coming from a touchscreen panel (as translated by a touch screen controller) and the display (typically an LCD) on which the touch screenpanel is mounted. This tutorial discusses how to calibrate the touch screen panel to match the display.
上传时间： 2013-10-21
上传用户：euroford
Analog Inputs and Outputs in an S7 PLC are represented in the PLC as a 16-bit integer. Over the nominal span of the analog input or output, the value of this integer will range between - 27648 and +27648. However, it is easier to use the analog values if they are scaled to the same units and ranges as the process being controlled. This applications tip describes methods for scaling analog values to and from engineering units.
上传时间： 2013-11-17
上传用户：3294322651
为了解决磁放大器性能测试过程中，需要对其供给不同数值恒定电流的问题，设计了一种基于DAC7512和单片机的数控恒流源系统。该系统采用AT89C51作为主控器件，将计算机发送的电流控制字命令转换为D/A转换器控制字，通过模拟SPI通信接口，写D/A控制字到DAC7512，从而控制其输出相应数字电压值，经差动缩放电路、电压/电路变换电路和功率驱动电路，最后输出恒定电流。实验结果表明，恒流源输出电流调节范围为-45~+45 mA、精度为±0.1 mA，分辨率达0.024 4 mA，具有应用灵活，外围电路简单，可靠性高的特点。该数控直流恒流源也可为相关产品的测试系统研发提供参考。 Abstract: In order to solve the need to supply different values constant current for the magnetic amplifier in testing process， numerical control constant current source system was designed based on DAC7512 chip and microcontroller technology. The system used the AT89C51 as the main chip， which can convert the current control word from computer into to D/A control words. And the system wrote D/A control word into the DAC7512 chip to control the output voltage value by the SPI communication interface， which can output corresponding constant current figures by scaling circuit， the V/I converter and power drive circuit. Experimental results show that the current source output current adjustment range is -45~+45mA， accuracy is ± 0.1mA， and resolution ratio is 0.024 4mA
上传时间： 2014-12-27
上传用户：invtnewer
中文版详情浏览：http://www.elecfans.com/emb/fpga/20130715324029.html Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture The Xilinx® UltraScale™ architecture delivers unprecedented levels of integration and capability with ASIC-class system- level performance for the most demanding applications. The UltraScale architecture is the industr y's f irst application of leading-edge ASIC architectural enhancements in an All Programmable architecture that scales from 20 nm planar through 16 nm FinFET technologies and beyond, in addition to scaling from monolithic through 3D ICs. Through analytical co-optimization with the X ilinx V ivado® Design Suite, the UltraScale architecture provides massive routing capacity while intelligently resolving typical bottlenecks in ways never before possible. This design synergy achieves greater than 90% utilization with no performance degradation. Some of the UltraScale architecture breakthroughs include: • Strategic placement (virtually anywhere on the die) of ASIC-like system clocks, reducing clock skew by up to 50% • Latency-producing pipelining is virtually unnecessary in systems with massively parallel bus architecture, increasing system speed and capability • Potential timing-closure problems and interconnect bottlenecks are eliminated, even in systems requiring 90% or more resource utilization • 3D IC integration makes it possible to build larger devices one process generation ahead of the current industr y standard • Greatly increased system performance, including multi-gigabit serial transceivers, I/O, and memor y bandwidth is available within even smaller system power budgets • Greatly enhanced DSP and packet handling The Xilinx UltraScale architecture opens up whole new dimensions for designers of ultra-high-capacity solutions.
标签： UltraScale Xilinx 架构
上传时间： 2013-11-13
上传用户：瓦力瓦力hong
The NXP LPC314x combine a 270 MHz ARM926EJ-S CPU core, High-speed USB 2.0OTG, 192 KB SRAM, NAND flash controller, flexible external bus interface, three channel10-bit A/D, and a myriad of serial and parallel interfaces in a single chip targeted atconsumer, industrial, medical, and communication markets. To optimize system powerconsumption, the LPC314x have multiple power domains and a very flexible ClockGeneration Unit (CGU) that provides dynamic clock gating and scaling.
上传时间： 2013-10-11
上传用户：yuchunhai1990
