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Fpga Implementation Of Digital Timing Recovery In Software Radio Receiver
FPGA Implementation Of Digital Timing Recovery In Software Radio Receiver:
资料->【E】光盘论文->【E1】斯坦福博士论文->05 calgary PhD Design of Galileo L1F Receiver Tracking Loops.pdf
2k mode OFDM transmitter and receiver for DVB-T standard
The TRS232E is a dual driver/receiver that includes a capacitive voltage generator to supply TIA/
GPS Engine Module“HPM103H-6 GPS Receiver”的说明书，有需要的可以
it is a sample program for universal sychronous asynchronous receiver transmitter
Least-squares searching for receiver position.Given 4 or more pseudoranges and ephemerides.
This toolbox is used to develop software defined radio for GPS receiver
A Software-Defined GPS And Galileo Receiver. Springer 20006年新书，书是pdf格式和书中的源代码为matlab。