Wireless technology has been evolving at a breakneck speed. The total number of cell-phones in use (as of 2011) was over 6 billion for a 7 billion world population [1] constituting 87% of the world population. Additionally, with user convenience be- coming paramount, more and more functions are being implemented wirelessly.
标签： Front-Ends Cognitive Receiver Radio
上传时间： 2020-05-26
上传用户：shancjb
This research work aims at eliminating the off-chip RF SAW filters from fre- quency division duplexed (FDD) receivers. In the first approach, a monolithic passive RF filter was constructed using on-chip capacitors and bondwire inductors. The bond- wire characteristics were studied in details and the effect of mutual inductive coupling between the bondwires on the filter performance was analyzed. Based on that, a bond- wire configuration was proposed to improve the frequency response of the filter. The filter was implemented in 0.18 µm CMOS process for WCDMA applications.
标签： Interference Mitigation Techniques
上传时间： 2020-05-27
上传用户：shancjb
Modeling and simulation of nonlinear systems provide communication system designers with a tool to predict and verify overall system performance under nonlinearity and complex communication signals. Traditionally, RF system designers use deterministic signals (discrete tones), which can be implemented in circuit simulators, to predict the performance of their nonlinear circuits/systems. However, RF system designers are usually faced with the problem of predicting system performance when the input to the system is real-world communication signals which have a random nature.
标签： Nonlinear_Distortion_in_Wireless_ Systems
上传时间： 2020-05-31
上传用户：shancjb
In this research, we have designed, developed implemented a wireless sensor networks based smart home for safe, sound and secured living environment for any inhabitant especially elderly living alone. We have explored a methodology for the development of efficient electronic real time data processing system to recognize the behaviour of an elderly person. The ability to determine the wellness of an elderly person living alone in their own home using a robust, flexible and data driven artificially intelligent system has been investigated. A framework integrating temporal and spatial contextual information for determining the wellness of an elderly person has been modelled. A novel behaviour detection process based on the observed sensor data in performing essential daily activities has been designed and developed.
上传时间： 2020-06-06
上传用户：shancjb
In this chapter we give a quick overview of control theory, explaining why integral feedback control works, describing PID controllers, and summariz- ing some of the currently available techniques for PID controller design. This background will serve to motivate our results on PID control, pre- sented in the subsequent chapters.
标签： Controllers Time-Delay Systems PID for
上传时间： 2020-06-10
上传用户：shancjb
这是我在做大学教授期间推荐给我学生的一本书，非常好，适合入门学习。《python深度学习》由Keras之父、现任Google人工智能研究员的弗朗索瓦•肖莱（François Chollet）执笔，详尽介绍了用Python和Keras进行深度学习的探索实践，包括计算机视觉、自然语言处理、产生式模型等应用。书中包含30多个代码示例，步骤讲解详细透彻。作者在github公布了代码，代码几乎囊括了本书所有知识点。在学习完本书后，读者将具备搭建自己的深度学习环境、建立图像识别模型、生成图像和文字等能力。但是有一个小小的遗憾：代码的解释和注释是全英文的，即使英文水平较好的朋友看起来也很吃力。本人认为，这本书和代码是初学者入门深度学习及Keras最好的工具。作者在github公布了代码，本人参照书本，对全部代码做了中文解释和注释，并下载了代码所需要的一些数据集（尤其是“猫狗大战”数据集），并对其中一些图像进行了本地化，代码全部测试通过。（请按照文件顺序运行，代码前后有部分关联）。以下代码包含了全书约80%左右的知识点，代码目录：2.1: A first look at a neural network（ 初识神经网络）3.5: Classifying movie reviews（电影评论分类：二分类问题）3.6: Classifying newswires（新闻分类：多分类问题 ）3.7: Predicting house prices（预测房价：回归问题）4.4: Underfitting and overfitting（ 过拟合与欠拟合）5.1: Introduction to convnets（卷积神经网络简介）5.2: Using convnets with small datasets（在小型数据集上从头开始训练一个卷积网络）5.3: Using a pre-trained convnet（使用预训练的卷积神经网络）5.4: Visualizing what convnets learn（卷积神经网络的可视化）
上传时间： 2022-01-30
上传用户：
STM32L053C8T6数据手册Features • Ultra-low-power platform – 1.65 V to 3.6 V power supply – -40 to 125 °C temperature range – 0.27 µA Standby mode (2 wakeup pins) – 0.4 µA Stop mode (16 wakeup lines) – 0.8 µA Stop mode + RTC + 8 KB RAM retention – 139 µA/MHz Run mode at 32 MHz – 3.5 µs wakeup time (from RAM) – 5 µs wakeup time (from Flash) • Core: ARM® 32-bit Cortex®-M0+ with MPU – From 32 kHz up to 32 MHz max. – 0.95 DMIPS/MHz • Reset and supply management – Ultra-safe, low-power BOR (brownout reset) with 5 selectable thresholds – Ultralow power POR/PDR – Programmable voltage detector (PVD) • Clock sources – 1 to 25 MHz crystal oscillator – 32 kHz oscillator for RTC with calibration – High speed internal 16 MHz factory-trimmed RC (+/- 1%) – Internal low-power 37 kHz RC – Internal multispeed low-power 65 kHz to 4.2 MHz RC – PLL for CPU clock • Pre-programmed bootloader – USART, SPI supported • Development support – Serial wire debug supported • Up to 51 fast I/Os (45 I/Os 5V tolerant) • Memories – Up to 64 KB Flash with ECC – 8KB RAM – 2 KB of data EEPROM with ECC – 20-byte backup register
标签： stm32l053c8t6
上传时间： 2022-02-06
上传用户：
数字示波器功能强大,使用方便,但是价格相对昂贵。本文以Ti的MSP430F5529为主控器,以Altera公司的EP2C5T144C8 FPGA器件为逻辑控制部件设计数字示波器。模拟信号经程控放大、整形电路后形成方波信号送至FPGA测频,根据频率值选择采用片上及片外高速AD分段采样。FPGA控制片外AD采样并将数据输入到FIFO模块中缓存,由单片机进行频谱分析。测试表明:简易示波器可以实现自动选档、多采样率采样、高精度测频及频谱分析等功能。Digital oscilloscope is powerful and easy to use, but also expensive. The research group designed a low-cost digital oscilloscope, the chip of MSP430F5529 of TI is chosen as the main controller and the device of EP2C5T144C8 of Altera company is used as the logic control unit. Analog signal enter the programmable amplifier circuit, shaping circuit and other pre-processing circuit. The shaped rectangular wave signal is sent to FPGA for measure the frequency. According to the frequency value to select AD on-chip or off-chip high-speed AD for sampling. FPGA controls the off-chip AD sampling and buffers AD data by FIFO module. The single chip microcomputer receives the data, and do FFT for spectrum analysis. The test shows that the simple oscilloscope can realize automatic gain selection, sampling at different sampling rates, high precision frequency measurement and spectrum analysis.
上传时间： 2022-03-27
上传用户：
实验教学一直是工科教学中不可或缺的组成部分,对培养学生的动手能力,独立思考能力,创新思维与发散思维具有重要的作用。针对目前电路教学实验中电路仿真实验与实物电路实验各自独立,无法统一问题,提出将仿真电路实验与实物电路实验有机的结合同步操作,并使用Web发布实现远程实验操作。采用Multisim作为电路实验仿真平台,NI Eiviss II作为实物电路实验硬件平台,运用LabVIEW整合Multisim电路仿真实验与实物电路实验,实现仿真与实物实验有机结合,两种实验可同步进行。学生在仿真实验中先可探索实验,然后做实物实验。同时运用LabVIEW开发出实验过程人机交互操作接口界面,使用过程中效果良好。Experimental teaching has always been an indispensable part of engineering education.And it always plays an important role in cultivating students'practical ability,independent thinking ability,innovative thinking and divergent thinking.But simulation experiment and physical experiment cannot be unified in the circuit teaching experiment at present.In order to solve this problem,this paper proposes to combine organically the simulation circuit experiment with physical circuit experiment,and synchronously operate them.This paper uses the WEB publishing to achieve remote experimental operation.Multisim is used as the circuit simulation platform,and NI Eiviss II is used as the physical circuit hardware platform.Multisim circuit simulation experiment and physical circuit experiment are implemented by LabVIEW to realize the combination of simulation experiment and physical experiment.Students do explore experiments in simulation experiment firstly,and then do physical experiment.And this paper uses LabVIEW to develop the experimental man-machine interface.
上传时间： 2022-04-05
上传用户：
为了提高超高频RFID系统中阅读器在低信噪比的情况下仍具有较高的识别能力,提出一种基于FPGA系统结合软件无线电方法实现超高频RFID射频前端电路方案。超高频射频识别系统必须符合EPC Class 1generation 2标准,所设计的电路系统以Xilinx公司的XC6SLX16-2CSG324FPGA芯片为硬件基础,将数字基带调制解调和中频滤波电路在FPGA系统中设计实现,重点阐述了射频前端电路的设计结构、AD/DA转换电路,以及数字滤波器的设计。实验结果表明,所设计的超高频RFID阅读器简化了前端电路系统结构,提升了稳定性,增强了抗干扰能力。该电路系统在信噪比较低的情况下,能够较好地实现915MHz频率的射频接收和发送。In order to improve the reader UHF RFID system still has a higher ability to identify,in the case of low signal-to-noise ratio.The UHF RFID systems must comply with EPC Class 1 generation 2 standard.In this paper,the design of the circuit system based on Xilinx＇s XC6SLX16-2CSG324 FPGA chip,and presents UHF RFID RF front-end circuit with software radio based on FPGA system.Digital baseband modem and IF filter circuit is designed and implemented in the FPGA system,and focused on designing the structure of the RF front-end circuit,AD/DA conversion circuits,and digital filter.Experimental results show that the UHF RFID reader de...
标签： 915mhz 超高频 rfid 阅读 射频 前端 电路 设计
上传时间： 2022-04-17
上传用户：shjgzh
