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nat-users-guide

  • Virtex-6 FPGA PCB设计手册

    Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the developmentof designs to operate with Xilinx hardware devices. You may not reproduce, distribute, republish, download, display, post, or transmit theDocumentation in any form or by any means including, but not limited to, electronic, mechanical, photocopying, recording, or otherwise,without the prior written consent of Xilinx. Xilinx expressly disclaims any liability arising out of your use of the Documentation. Xilinx reservesthe right, at its sole discretion, to change the Documentation without notice at any time. Xilinx assumes no obligation to correct any errorscontained in the Documentation, or to advise you of any corrections or updates. Xilinx expressly disclaims any liability in connection withtechnical support or assistance that may be provided to you in connection with the Information.

    标签: Virtex FPGA PCB 设计手册

    上传时间: 2014-01-13

    上传用户:竺羽翎2222

  • DS306-PPC405 Virtex-4 Wrapper

    The PPC405 Virtex-4 is a wrapper around the Virtex-4PowerPC™ 405 Processor Block primitive. For detailsregarding the PowerPC 405, see the PowerPC 405 ProcessorBlock Reference Guide.

    标签: Wrapper Virtex 306 405

    上传时间: 2014-12-05

    上传用户:flg0001

  • xilinx Zynq-7000 EPP产品简介

    The Xilinx Zynq-7000 Extensible Processing Platform (EPP) redefines the possibilities for embedded systems, giving system and software architects and developers a flexible platform to launch their new solutions and traditional ASIC and ASSP users an alternative that aligns with today’s programmable imperative. The new class of product elegantly combines an industrystandard ARMprocessor-based system with Xilinx 28nm programmable logic—in a single device. The processor boots first, prior to configuration of the programmable logic. This, along with a streamlined workflow, saves time and effort and lets software developers and hardware designers start development simultaneously. 

    标签: xilinx Zynq 7000 EPP

    上传时间: 2013-11-01

    上传用户:dingdingcandy

  • CPLD库指南

    Xilinx is disclosing this user guide, manual, release note, and/or specification (the “Documentation”) to you solely for use in the development of designs to operate with Xilinx hardware devices. You may not reproduce, distribute, republish, download, display, post, or transmit the Documentation in any form or by any means including, but not limited to, electronic, mechanical, photocopying, recording, or otherwise, without the prior written consent of Xilinx. Xilinx expressly disclaims any liability arising out of your use of the Documentation. Xilinx reserves the right, at its sole discretion, to change the Documentation without notice at any time. Xilinx assumes no obligation to correct any errors contained in the Documentation, or to advise you of any corrections or updates. Xilinx expressly disclaims any liability in connection with technical support or assistance that may be provided to you in connection with the Information.  

    标签: CPLD

    上传时间: 2013-10-22

    上传用户:李哈哈哈

  • Virtex-5 GTP Transceiver Wizar

    The LogiCORE™ GTP Wizard automates the task of creating HDL wrappers to configure the high-speed serial GTP transceivers in Virtex™-5 LXT and SXT devices. The menu-driven interface allows one or more GTP transceivers to be configured using pre-definedtemplates for popular industry standards, or from scratch, to support a wide variety of custom protocols.The Wizard produces a wrapper, an example design, and a testbench for rapid integration and verification of the serial interface with your custom function Features• Creates customized HDL wrappers to configureVirtex-5 RocketIO™ GTP transceivers• Users can configure Virtex-5 GTP transceivers toconform to industry standard protocols usingpredefined templates, or tailor the templates forcustom protocols• Included protocol templates provide support for thefollowing specifications: Aurora, CPRI, FibreChannel 1x, Gigabit Ethernet, HD-SDI, OBSAI,OC3, OC12, OC48, PCI Express® (PCIe®), SATA,SATA II, and XAUI• Automatically configures analog settings• Each custom wrapper includes example design, testbench; and both implementation and simulation scripts

    标签: Transceiver Virtex Wizar GTP

    上传时间: 2013-10-23

    上传用户:leyesome

  • CC2540 Bluetooth Low Energy Software Developer’s Guide swru271d

    CC2540 软件开发手册

    标签: Bluetooth Developer Software Energy

    上传时间: 2013-10-11

    上传用户:xzt

  • Cisco 3550 思科3550交换机配置手册

    Catalyst 3550 Multilayer Switch Software Configuration Guide

    标签: 3550 Cisco 思科 交换机

    上传时间: 2013-11-20

    上传用户:kaje

  • Catalyst 2950与Catalyst 2955交换机

    Catalyst 2950 and Catalyst 2955 Switch Software Configuration Guide

    标签: Catalyst 2950 2955 交换机

    上传时间: 2013-10-29

    上传用户:taozhihua1314

  • 利用LVS中的IP负载均衡技术建立可伸缩性网络服务

    从LVS的通用体系结构入手,分析了IPVS软件的工作原理,讨论了三种IP负载均衡技术;在分析网络地址转换方法(VS/NAT)的缺点和网络服务的非对称性的基础上,给出了通过IP隧道实现虚拟服务器的方法VS/TUN,和通过直接路由实现虚拟服务器的方法VS/DR,极大地提高了系统的可伸缩性。该技术为建立和维护大型网络服务具有实际应用价值和指导意义。

    标签: LVS 负载均衡技术 可伸缩 网络服务

    上传时间: 2013-11-20

    上传用户:15736969615

  • CodeWarrior开发套件简明指南

    The CodeWarrior Development Suite provides access and technical support to amultitude of CodeWarrior products. In this quick start guide, Section 1 explains howto register your CodeWarrior Development Suite. Section 2 explains how to activateand install one of your products. Section 3 describes what you are entitled to withthe purchase of your CodeWarrior Development Suite, and Section 4 discusses theavailable purchase options. Section 5 describes the benefits of maintaining a currenttechnical support contract, and Section 6 tells you how to access support.

    标签: CodeWarrior 开发套件

    上传时间: 2014-03-02

    上传用户:784533221