【摘要】本文结合作者多年的印制板设计经验，着重印制板的电气性能，从印制板稳定性、可靠性方面，来讨论多层印制板设计的基本要求。【关键词】印制电路板；表面贴装器件；高密度互连；通孔【Key words】Printed Circuit Board；Surface Mounting Device；High Density Interface；Via一．概述印制板（PCB－Printed Circuit Board）也叫印制电路板、印刷电路板。多层印制板，就是指两层以上的印制板，它是由几层绝缘基板上的连接导线和装配焊接电子元件用的焊盘组成，既具有导通各层线路，又具有相互间绝缘的作用。随着SMT（表面安装技术）的不断发展，以及新一代SMD（表面安装器件）的不断推出，如QFP、QFN、CSP、BGA（特别是MBGA），使电子产品更加智能化、小型化，因而推动了PCB工业技术的重大改革和进步。自1991年IBM公司首先成功开发出高密度多层板（SLC）以来，各国各大集团也相继开发出各种各样的高密度互连（HDI）微孔板。这些加工技术的迅猛发展，促使了PCB的设计已逐渐向多层、高密度布线的方向发展。多层印制板以其设计灵活、稳定可靠的电气性能和优越的经济性能，现已广泛应用于电子产品的生产制造中。下面，作者以多年设计印制板的经验，着重印制板的电气性能，结合工艺要求，从印制板稳定性、可靠性方面，来谈谈多层制板设计的基本要领。
上传时间： 2013-10-08
上传用户：zhishenglu
The LogiCORE™ GTP Wizard automates the task of creating HDL wrappers to configure the high-speed serial GTP transceivers in Virtex™-5 LXT and SXT devices. The menu-driven interface allows one or more GTP transceivers to be configured using pre-definedtemplates for popular industry standards, or from scratch, to support a wide variety of custom protocols.The Wizard produces a wrapper, an example design, and a testbench for rapid integration and verification of the serial interface with your custom function Features• Creates customized HDL wrappers to configureVirtex-5 RocketIO™ GTP transceivers• Users can configure Virtex-5 GTP transceivers toconform to industry standard protocols usingpredefined templates, or tailor the templates forcustom protocols• Included protocol templates provide support for thefollowing specifications: Aurora, CPRI, FibreChannel 1x, Gigabit Ethernet, HD-SDI, OBSAI,OC3, OC12, OC48, PCI Express® (PCIe®), SATA,SATA II, and XAUI• Automatically configures analog settings• Each custom wrapper includes example design, testbench; and both implementation and simulation scripts
标签： Transceiver Virtex Wizar GTP
上传时间： 2013-10-20
上传用户：dave520l
a8259 可编程中断控制 altera提供 The a8259 is designed to simplify the implementation of the interrupt interface in 8088 and 8086 based microcomputer systems. The device is known as a programmable interrupt controller. The a8259 receives and prioritizes up to 8 interrupts, and in the cascade mode, this can be expanded up to 64 interrupts. An asynchronous reset and a clock input have been added to improve operation and reliability.
上传时间： 2015-01-02
上传用户：panpanpan
The data plane of the reference design consists of a configurable multi-channel XBERT modulethat generates and checks high-speed serial data transmitted and received by the MGTs. Eachchannel in the XBERT module consists of two MGTs (MGTA and MGTB), which physicallyoccupy one MGT tile in the Virtex-4 FPGA. Each MGT has its own pattern checker, but bothMGTs in a channel share the same pattern generator. Each channel can load a differentpattern. The MGT serial rate depends on the reference clock frequency and the internal PMAdivider settings. The reference design can be scaled anywhere from one channel (two MGTs)to twelve channels (twenty-four MGTs).
上传时间： 2013-12-25
上传用户：jkhjkh1982
The high defi nition multimedia interface (HDMI) is fastbecoming the de facto standard for passing digitalaudio and video data in home entertainment systems.This standard includes an I2C type bus called a displaydata channel (DDC) that is used to pass extended digitalinterface data (EDID) from the sinkdevice (such as adigital TV) to the source device (such as a digital A/Vreceiver). EDID includes vital information on the digitaldata formats that the sink device can accept. The HDMIspecifi cation requires that devices have less than 50pFof input capacitance on their DDC bus lines, which canbe very diffi cult to meet. The LTC®4300A’s capacitancebuffering feature allows devices to pass the HDMI DDCinput capacitance compliance test with ease.
上传时间： 2013-11-21
上传用户：tian126vip
SPI（Serial Peripheral Interface，串行外围接口）是Motorola公司提出的外围接口协议，它采用一个串行、同步、全双工的通信方式，解决了微处理器和外设之间的串行通信问题，并且可以和多个外设直接通信，具有配置灵活，结构简单等优点。根据全功能SPI总线的特点，设计的SPI接口可以最大发送和接收16位数据；在主模式和从模式下SPI模块的时钟频率最大可以达到系统时钟的1/4，并且在主模式下可以提供具有四种不同相位和极性的时钟供从模块选择；可以同时进行发送和接收操作，拥有中断标志位和溢出中断标志位。
上传时间： 2013-11-11
上传用户：himbly
Abstract: How can an interface change a happy face to a sad face? Engineers have happy faces when an interface works properly.Sad faces indicate failure somewhere. Because interfaces between microprocessors and ICs are simple—even easy—they are oftenignored until interface failure causes sad faces all around. In this article, we discuss a common SPI error that can be almostimpossible to find in a large system. Links to interface tutorial information are provided for complete information. Noise as a systemissue and ICs to minimize its effects are also described.
上传时间： 2013-11-18
上传用户：zgz317
A collection of interface applications between various microprocessors/ controllers and the LTC1090 family of data acquisition systems. The note is divided into sections specific to each interface.
上传时间： 2013-11-08
上传用户：sssnaxie
SL811开发资料_包含源程序_电路图_芯片资料:SL811HS Embedded USB Host/Slave Controller.The SL811HS is an Embedded USB Host/Slave Controller capable of communicate with either full-speed or low-speed USB peripherals. The SL811HS can interface to devices such as microprocessors, microcontrollers, DSPs, or directly to a variety of buses such as ISA, PCMCIA, and others. The SL811HS USB Host Controller conforms to USB Specification 1.1.The SL811HS USB Host/Slave Controller incorporates USB Serial Interface functionality along with internal full-/low-speed transceivers.The SL811HS supports and operates in USB full-speed mode at 12 Mbps, or at low-speed 1.5-Mbps mode.The SL811HS data port and microprocessor interface provide an 8-bit data path I/O or DMA bidirectional, with interrupt support to allow easy interface to standard microprocessors or microcontrollers such as Motorola or Intel CPUs and many others. Internally,the SL811HS contains a 256-byte RAM data buffer which is used for control registers and data buffer.The available package types offered are a 28-pin PLCC (SL811HS) and a 48-pin TQFP package (SL811HST-AC). Both packages operate at 3.3 VDC. The I/O interface logic is 5V-tolerant.
上传时间： 2013-12-22
上传用户：a82531317
ARM通讯 H-JTAG 是一款简单易用的的调试代理软件，功能和流行的MULTI-ICE 类似。H-JTAG 包括两个工具软件：H-JTAG SERVER 和H-FLASHER。其中，H-JTAG SERVER 实现调试代理的功能，而H-FLASHER则实现了FLASH 烧写的功能。H-JTAG 的基本结构如下图1-1所示。 H-JTAG支持所有基于ARM7 和ARM9的芯片的调试，并且支持大多数主流的ARM调试软件，如ADS、RVDS、IAR 和KEIL。通过灵活的接口配置，H-JTAG 可以支持WIGGLER，SDT-JTAG 和用户自定义的各种JTAG 调试小板。同时，附带的H-FLASHER 烧写软件还支持常用片内片外FLASH 的烧写。使用H-JTAG，用户能够方便的搭建一个简单易用的ARM 调试开发平台。H-JTAG 的功能和特定总结如下： 1. 支持 RDI 1.5.0 以及 1.5.1； 2. 支持所有ARM7 以及 ARM9 芯片； 3. 支持 THUMB 以及ARM 指令； 4. 支持 LITTLE-ENDIAN 以及 BIG-ENDIAN； 5. 支持 SEMIHOSTING； 6. 支持 WIGGLER， SDT-JTAG和用户自定义JTAG调试板； 7. 支持 WINDOWS 9.X/NT/2000/XP； 8．支持常用FLASH 芯片的编程烧写； 9. 支持LPC2000 和AT91SAM 片内FLASH 的自动下载；
上传时间： 2013-11-19
上传用户：水中浮云
