The bootloader is stored in the internal boot ROM memory (system memory) of STM32devices. It is programmed by ST during production. Its main task is to download theapplication program to the internal Flash memory through one of the available serialperipherals (USART, CAN, USB, etc.). A communication protocol is defined for each serialinterface, with a compatible command set and sequences
上传时间： 2014-09-06
上传用户：417313137
The MSP-FET430PIF is a Parallel Port interface (does not include target board) that is used to program and debug MSP430 FET tools and test boards through the JTAG interface. This interface is included in our FET tools, but sold without the development board. This interface uses a Parallel PC Port to communicate to the Debugger Software (IAR Kickstart software included) running on the PC. The interface uses the standard 14 pin header to communicate to the MSP430 device using the standard JTAG protocol. The flash memory can be erased and programmed in seconds with only a few keystrokes, and since the MSP430 flash is extremely low power, no external power supply is required. The tool has an integrated software environment and connects directly to the PC which greatly simplifies the set-up and use of the tool. The flash development tool supports development with all MSP430 flash parts. Features MSP430 debugging interface to connect a MSP430-Flash-device to a Parallel port on a PC Supports JTAG debug protocol (NO support for Spy-Bi-Wire (2-wire JTAG) debug protocol, Spy-Bi-Wire (2-wire JTAG) is supported by MSP-FET430UIF) Parallel Port cable and a 14-conductor target cable Full documentation on CD ROM Integrated IAR Kickstart user interface which includes: Assembler Linker Limulator Source-level debugger Limited C-compiler Technical specifications: Backwardly compatable with existing FET tool boards.
上传时间： 2013-10-26
上传用户：fengweihao158@163.com
The MSP-FET430U14 is a powerful flash emulation tool to quickly begin application development on the MSP430 MCU. It includes USB debugging interface used to program and debug the MSP430 in-system through the JTAG interface or the pin saving Spy Bi-Wire (2-wire JTAG) protocol. The flash memory can be erased and programmed in seconds with only a few keystrokes, and since the MSP430 flash is ultra-low power, no external power supply is required. The debugging tool interfaces the MSP430 to the included integrated software environment and includes code to start your design immediately. The MSP-FET430UIF development tools supports development with all MSP430 flash devices
上传时间： 2013-10-28
上传用户：13691535575
keil c51 v9.01此版不是汉化中文版，是英文版来的。ARM发布Keil μVision4集成开发环境(IDE)，用来在微控制器和智能卡设备上创建、仿真和调试嵌入式应用。 μVision4 IDE是为增强开发人员的工作效率设计的，有了它可以更快速、更高效地开发和检验程序。通过μVision4 IDE中引入的灵活的窗口管理系统，开发人员可以使用多台监视器，在可视界面任何地方全面控制窗口放置。 新用户界面可以更好地利用屏幕空间，更有效地组织多个窗口，为开发应用提供整齐高效的环境。 μVision4在μVision3的成功经验的基础上增加了：* System Viewer (系统查看程序)窗口，提供了设备外围寄存器信息，这些信息可以在System Viewer窗口内部直接更改。* Debug Restore Views (调试恢复视图)允许保存多个窗口布局，为程序分析迅速选择最适合的调试视图。* Multi-Project Workspace(多项目工作空间)为处理多个并存的项目提供了简化的方法，如引导加载程序和应用程序。* 为基于ARM Cortex 处理器的MCU提供了Data and instruction trace(数据和指令追踪)功能。* 扩展了Device Simulation(设备仿真)功能以支持许多新设备，如Luminary、NXP和东芝生产的基于ARM Cortex-M3处理器的MCU；Atmel SAM7/9；及新的8051衍生品，如Infineon XC88x和SiLABS 8051Fxx。* 支持许多debug adapter interfaces(调试适配器接口)，包括ADI miDAS Link、Atmel SAM-ICE、Infineon DAS和ST-Link。
上传时间： 2013-10-31
上传用户：qingdou
NXP Semiconductor designed the LPC2400 microcontrollers around a 16-bit/32-bitARM7TDMI-S CPU core with real-time debug interfaces that include both JTAG andembedded Trace. The LPC2400 microcontrollers have 512 kB of on-chip high-speedFlash memory. This Flash memory includes a special 128-bit wide memory interface andaccelerator architecture that enables the CPU to execute sequential instructions fromFlash memory at the maximum 72 MHz system clock rate. This feature is available onlyon the LPC2000 ARM Microcontroller family of products. The LPC2400 can execute both32-bit ARM and 16-bit Thumb instructions. Support for the two Instruction Sets meansEngineers can choose to optimize their application for either performance or code size atthe sub-routine level. When the core executes instructions in Thumb state it can reducecode size by more than 30 % with only a small loss in performance while executinginstructions in ARM state maximizes core performance.
上传时间： 2013-11-15
上传用户：zouxinwang
CCAVR软件有ISP功能，能过调用STK500完成的，只要设置好参数，在ICCAVR中就可以给芯片编程了，还可以让程序一编译完就自动下载到芯片中，相当方便。在Tools->environment options->ISP里设定STK500.exe的路径。— 用于调用STK500程序。在Tools->In system programming 里Programmer Interface中选中STK500。— 选择STK500下载方式。在Tools->In system programming 里把Auto Program After Compile 的小勾选上。— 编译后自动编程。在Tools->In system programming 中还有一些设置项，大家可以根据需要进行相关设置。下面的图片是操作过程。
上传时间： 2013-11-17
上传用户：joseph
PIC单片机实用教程基础篇+提高篇 PIC单片机（Peripheral Interface Controller）是一种用来开发的去控制外围设备的集成电路（IC）。一种具有分散作用（多任务）功能的CPU。与人类相比，大脑就是CPU，PIC 共享的部分相当于人的神经系统。 PIC 单片机是一个小的计算机 PIC单片机有计算功能和记忆内存像CPU并由软件控制允行。然而，处理能力—存储器容量却很有限，这取决于PIC的类型。但是它们的最高操作频率大约都在20MHz左右，存储器容量用做写程序的大约1K—4K字节。 时钟频率与扫描程序的时间和执行程序指令的时间有关系。但不能仅以时钟频率来判断程序处理能力，它还随处理装置的体系结构改变（1*）。如果是同样的体系结构，时钟频率较高的处理能力会较强。 这里用字来解释程序容量。用一个指令（2*）表示一个字。通常用字节（3*）来表示存储器（4*）容量。一个字节有8位，每位由1或0组成。PIC16F84A单片机 的指令由14位构成。当把1K个子转换成位为：1 x 1,024 x 14 = 14,336位。再转换为字节为：14,336/(8 x 1,024) = 1.75K。在计算存储器的容量时，我们规定 1G 字节 = 1,024M 字节, 1M 字节 = 1,024K 字节, 1K 字节= 1,024 字节. 它们不是以1000为倍数，因为这是用二进制计算的缘故。 1*计算机的物理结构,包括组织结构、容量、该计算机的CPU、存储器以及输入输出设备间的互连。经常特指CPU的组织结构,包括它的寄存器、标志、总线、算术逻辑部件、指令译码与执行机制以及定时和控制部件。 2*指出某种操作并标识其操作数(如果有操作数的话)的一种语言构造 3*作为一个单位来操作(运算)的一个二进制字符串,通常比计算机的一个字短。 4*处理机内的所有可寻址存储空间以及用于执行指令的其它内存储器。 在计算存储器的容量时，我们规定 1G 字节 = 1,024M 字节, 1M 字节 = 1,024K 字节, 1K 字节= 1,024 字节. 它们不是以1000为倍数，因为这是用二进制计算的缘故。 用PIC单片机使电路做的很小巧变得可能。 因为PIC单片机可以把计算部分、内存、输入和输出等都做在一个芯片内。所以她工作起来效率很高、功能也自由定义还可以灵活的适应不同的控制要求，而不必去更换不同的IC。这样电路才有可能做的很小巧。
上传时间： 2013-10-15
上传用户：sxdtlqqjl
The CAT28LV64 is a low voltage, low power, CMOS Parallel EEPROM organized as 8K x 8−bits. It requires a simple interface for in−system programming. On−chip address and data latches, self−timed write cycle with auto−clear and VCC power up/down write protection eliminate additional timing and protection hardware. DATA Polling and Toggle status bit signal the start and end of the self−timed write cycle. Additionally, the CAT28LV64 features hardware and software write protection.
上传时间： 2013-11-16
上传用户：浩子GG
The CAT25128 is a 128−Kb Serial CMOS EEPROM device internally organized as 16Kx8 bits. This features a 64−byte page write buffer and supports the Serial Peripheral Interface (SPI) protocol. The device is enabled through a Chip Select (CS) input. In addition, the required bus signals are clock input (SCK), data input (SI) and data output (SO) lines. The HOLD input may be used to pause any serial communication with the CAT25128 device. The device featuressoftware and hardware write protection, including partial as well as full array protection.
上传时间： 2013-11-15
上传用户：fklinran
CAT5110/18/19/23/24/25 linear-taper digitally programmable potentiometers perform the same function as a mechanical potentiometer or a variable resistor. These devices consist of a fixed resistor and a wiper contact with 32-tap points that are digitally controlled through a2-wire up/down serial interface.
上传时间： 2013-11-22
上传用户：541657925
