Top module name : SHIFTER (File name : SHIFTER.v) 2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGH
Top module name : SHIFTER (File name : SHIFTER.v) 2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGHT. 3. Output pins: ...
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Top module name : SHIFTER (File name : SHIFTER.v) 2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGHT. 3. Output pins: ...
Top module name : SHIFTER (File name : SHIFTER.v) 2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGHT. 3. Output pins: ...
This example uses the AIC23 codec module of the DM642 EVM Board Support * Library to generate a 1KHz sine wave on the ...
FatFs06.rar FatFs is a generic file system module to implement the FAT file system to small embedded systems. The FatFs...
This is IR (Infra-Red) learn module for home automation system. It can learn IR codes from different IR remotes, and the...
标签: Verilog 分频器 N倍奇数分频器.(Verilog) N_odd_divider.v / Verilog module N_odd_divider (
This program I use to tested serial com and AT Command for testing GPRS for SIM300 GSM module
ppc 下读取电池状态的代码。 This sample demonstrates how to use the State and Notification Broker APIs.
Optimized Link State Routing是IETF正在研究的、用于移动式无线行动网络(这里,不仅终端用户可移动,路由器和服务器等也可以)的几个协议之一。该项目的实施弥补了Hipercom项目的一个内容。
Display RGB, and an iPOD image on 2.2" TFT color LCD module. IC driver is SSD1289. mcu is Microchip PIC18LF4550