基于OFDM的无线宽带系统仿真It contains mainly two parts, i.e. link-level simulator and system-level simulator. link-level simulator focus on a single-cell single-user scenario, where signal is transmitted from tx, and estimated at rx. Comparing the difference in tx/rx signal, the error rate can be found out. The output of the link-level simulator is the BLER/BER vs. SNR mapping table, that can be used for the system-level simulation. System-level simulator focus on a multi-cell multi-user scenario. For the sake of simplicity, it takes the mapping table aquired in the link-level simulation, measure the actural SNR, and finds the corresponding error rate.
标签： simulator i.e. system-level link-level
上传时间： 2016-03-15
上传用户：xsnjzljj
In this first part of the book the Vienna Link Level (LL) Simulators are described. The first chapter provides basics of LL simulations, introduces the most common variables and parameters as well as the transceiver structures that are applied in Long-Term Evolution (LTE) and Long-Term Evolution-Advanced (LTEA). We focus here mostly on the Downlink (DL) of LTE as most results reported in later chapters are related to DL transmissions.
标签： LTE-Advanced Simulators Vienna
上传时间： 2020-06-01
上传用户：shancjb
Link & System-Level Wireless OFDM System Simulator Version，仿真了OFDM
标签： System-Level Simulator Wireless Version
上传时间： 2013-12-18
上传用户：xg262122
J-Link用户手册(中文)，是学习ARM开发的好东知。
上传时间： 2013-04-24
上传用户：mingaili888
·摘要： 针对DSP芯片TS201的LINK口互连在高速数据通信中存在数据错误、突发数据块传输不稳定等缺点,在分析其通信协议的基础上,并结合实际应用,提出了设计LINK口通信的关键要求,给出设计的要点,设计与实现了TS201的LINK 121互连以及FPGA(Xilinx公司的XC4VFX60)与TS201 LINK口互连,得到了实际测试结果;结果表明,所设计的LINK口互连具备的优点有
上传时间： 2013-06-07
上传用户：417313137
ST-Link仿真器驱动程序(IAR EWARM V5升级版)
上传时间： 2013-04-24
上传用户：hewenzhi
J-LINK驱动程序arm v4.10b，需要的下载用用吧。
上传时间： 2013-04-24
上传用户：chfanjiang
FPGA-based link layer chip S19202 configuration
标签： configuration FPGA-based S19202 layer
上传时间： 2013-08-18
上传用户：xsnjzljj
DC-link Automotive: MKP1849 (Customized)电动汽车电驱直流母线电容（顾客订制品）MKP1849系列.MKP1849-可集成母线排，大大降低了寄生电感，提高了系统稳定性。
上传时间： 2013-10-13
上传用户：nanfeicui
The PCA9517 is a CMOS integrated circuit that provides level shifting between lowvoltage (down to 0.9 V) and higher voltage (2.7 V to 5.5 V) I2C-bus or SMBus applications.While retaining all the operating modes and features of the I2C-bus system during thelevel shifts, it also permits extension of the I2C-bus by providing bidirectional buffering forboth the data (SDA) and the clock (SCL) lines, thus enabling two buses of 400 pF. Usingthe PCA9517 enables the system designer to isolate two halves of a bus for both voltageand capacitance. The SDA and SCL pins are over voltage tolerant and arehigh-impedance when the PCA9517 is unpowered.
标签： translating Level 9517 PCA
上传时间： 2013-12-25
上传用户：wsf950131
