The latest generation of Texas Instruments (TI) boardmountedpower modules utilizes a pin interconnect technologythat improves surface-mount manufacturability.These modules are produced as a double-sided surfacemount(DSSMT) subassembly, yielding a case-less constructionwith subcomponents located on both sides of theprinted circuit board (PCB). Products produced in theDSSMT outline use the latest high-efficiency topologiesand magnetic-component packaging. This providescustomers with a high-efficiency, ready-to-use switchingpower module in a compact, space-saving package. Bothnonisolated point-of-load (POL) switching regulators andthe isolated dc/dc converter modules are being producedin the DSSMT outline.TI’s plug-in power product line offers power modules inboth through-hole and surface-mount packages. The surfacemountmodules produced in the DSSMT outline use asolid copper interconnect with an integral solder ball fortheir
上传时间： 2013-10-10
上传用户：1184599859
TLC2543是TI公司的12位串行模数转换器，使用开关电容逐次逼近技术完成A/D转换过程。由于是串行输入结构，能够节省51系列单片机I/O资源；且价格适中，分辨率较高，因此在仪器仪表中有较为广泛的应用。 TLC2543的特点 （1）12位分辩率A/D转换器； （2）在工作温度范围内10μs转换时间； （3）11个模拟输入通道； （4）3路内置自测试方式； （5）采样率为66kbps； （6）线性误差±1LSBmax； （7）有转换结束输出EOC； （8）具有单、双极性输出； （9）可编程的MSB或LSB前导； （10）可编程输出数据长度。 TLC2543的引脚排列及说明 TLC2543有两种封装形式：DB、DW或N封装以及FN封装，这两种封装的引脚排列如图1，引脚说明见表1 TLC2543电路图和程序欣赏 #include<reg52.h> #include<intrins.h> #define uchar unsigned char #define uint unsigned int sbit clock=P1^0; sbit d_in=P1^1; sbit d_out=P1^2; sbit _cs=P1^3; uchar a1,b1,c1,d1; float sum,sum1; double sum_final1; double sum_final; uchar duan[]={0x3f,0x06,0x5b,0x4f,0x66,0x6d,0x7d,0x07,0x7f,0x6f}; uchar wei[]={0xf7,0xfb,0xfd,0xfe}; void delay(unsigned char b) //50us { unsigned char a; for(;b>0;b--) for(a=22;a>0;a--); } void display(uchar a,uchar b,uchar c,uchar d) { P0=duan[a]|0x80; P2=wei[0]; delay(5); P2=0xff; P0=duan[b]; P2=wei[1]; delay(5); P2=0xff; P0=duan[c]; P2=wei[2]; delay(5); P2=0xff; P0=duan[d]; P2=wei[3]; delay(5); P2=0xff; } uint read(uchar port) { uchar i,al=0,ah=0; unsigned long ad; clock=0; _cs=0; port<<=4; for(i=0;i<4;i++) { d_in=port&0x80; clock=1; clock=0; port<<=1; } d_in=0; for(i=0;i<8;i++) { clock=1; clock=0; } _cs=1; delay(5); _cs=0; for(i=0;i<4;i++) { clock=1; ah<<=1; if(d_out)ah|=0x01; clock=0; } for(i=0;i<8;i++) { clock=1; al<<=1; if(d_out) al|=0x01; clock=0; } _cs=1; ad=(uint)ah; ad<<=8; ad|=al; return(ad); } void main() { uchar j; sum=0;sum1=0; sum_final=0; sum_final1=0; while(1) { for(j=0;j<128;j++) { sum1+=read(1); display(a1,b1,c1,d1); } sum=sum1/128; sum1=0; sum_final1=(sum/4095)*5; sum_final=sum_final1*1000; a1=(int)sum_final/1000; b1=(int)sum_final%1000/100; c1=(int)sum_final%1000%100/10; d1=(int)sum_final%10; display(a1,b1,c1,d1); } }
上传时间： 2013-11-19
上传用户：shen1230
针对科研实验中对拉压千斤顶加载过程控制的需要，采用ATmega128单片机控制步进电机进而实现对执行系统的电动泵站实行自动控制。对力和位移的数据采集与处理及用步进电机控制电动泵站手柄的技术细节作了重点描述。通过单片机的A/D变换器对AMP放大模块采集的电桥信号作量化处理，千斤顶的操控手柄位置依电动油泵阀门开启的方向和大小作若干定位，单片机根据力或位移传感器信号，实时控制步进电机驱动手柄旋转到相应操控位置。 Abstract: This article describes the use of ATmega128 AVR microcontroller series of DBS electric pumping stations and QF100/200 separate twoway hydraulic jack to automate the process of manipulating the work of the technical content. Articles on force and displacement data acquisition and processing， and stepper motor control electric pump with the handle of the key technical details were described. Through the MCU’s A / D converter module is collected on the AMP amplification quantify the signal bridge， jack handle position control valve opening according to the direction of electric pumps for a number of positioning and size of the microcontroller based on force or displacement sensor signals， real-time control stepper motor drive control handle rotate to the appropriate location.
上传时间： 2014-01-16
上传用户：hasan2015
C51 中的关键字关键字 用途 说明auto 存储种类说明 用以说明局部变量，缺省值为此break 程序语句 退出最内层循环case 程序语句 Switch 语句中的选择项char 数据类型说明 单字节整型数或字符型数据const 存储类型说明 在程序执行过程中不可更改的常量值continue 程序语句 转向下一次循环default 程序语句 Switch 语句中的失败选择项do 程序语句 构成do..while 循环结构double 数据类型说明 双精度浮点数else 程序语句 构成if..else 选择结构enum 数据类型说明 枚举extern 存储种类说明 在其他程序模块中说明了的全局变量flost 数据类型说明 单精度浮点数for 程序语句 构成for 循环结构goto 程序语句 构成goto 转移结构if 程序语句 构成if..else 选择结构int 数据类型说明 基本整型数long 数据类型说明 长整型数register 存储种类说明 使用CPU 内部寄存的变量return 程序语句 函数返回short 数据类型说明 短整型数signed 数据类型说明 有符号数，二进制数据的最高位为符号位sizeof 运算符 计算表达式或数据类型的字节数static 存储种类说明 静态变量struct 数据类型说明 结构类型数据swicth 程序语句 构成switch 选择结构typedef 数据类型说明 重新进行数据类型定义union 数据类型说明 联合类型数据unsigned 数据类型说明 无符号数数据void 数据类型说明 无类型数据volatile 数据类型说明 该变量在程序执行中可被隐含地改变while 程序语句 构成while 和do..while 循环结构ANSIC 标准关键字关键字 用途 说明bit 位标量声明 声明一个位标量或位类型的函数sbit 位标量声明 声明一个可位寻址变量
标签： C51
上传时间： 2013-10-08
上传用户：waves_0801
The ISO7220 and ISO7221 are dual-channel digital isolators. To facilitate PCB layout, the channels are orientedin the same direction in the ISO7220 and in opposite directions in the ISO7221. These devices have a logic inputand output buffer separated by TI’s silicon-dioxide (SiO2) isolation barrier, providing galvanic isolation of up to4000 V. Used in conjunction with isolated power supplies, these devices block high voltage, isolate grounds, andprevent noise currents on a data bus or other circuits from entering the local ground and interfering with ordamaging sensitive circuitry.
上传时间： 2013-10-24
上传用户：hbsunhui
keil 使用笔记:在Memory窗口上输入address_type:address才能看到正确地址的变量debug～perfermance analyzer加入要察看的模块名称，然后view～perfermance analyzer window 可以察看各个模块运行时间①Display address_type:address B:Bit address C:Code Memory Bx:Code Bank D D：80H 命令可以查看特殊寄存器 data D I：0 命令可以查看内部RAM数据iData； D X：0 命令可以查看外部RAM数据xData； ②R1 //显示R1 register ~R1 //显示变量R1 R1 = R7 //对寄存器Rx操作R1 = --R7 R1 = 0x20 ③main //显示main()的开始地址d main //显示main()的代码④向RAM.ROM中写数据Enter data_type address_type:address expr,expr.... data_type:int char double float long E char data:0x20 1,2,3,4 //向data区0x20开始的地址写1,2,3,4 变量放在RAM的30H，要把定义放在main前面!另外特别注意，内部RAM通常供C程序存放中间变量等，所以一定要看看编译后的程序中是否存在存储单元冲突的情况，比如如果程序中 使用了别的寄存器组的话，08-1FH单元就不能用了unsigned long data i _at_ 0x30
上传时间： 2013-11-05
上传用户：dongqiangqiang
In this document, the term Ô60xÕ is used to denote a 32-bit microprocessor from the PowerPC architecture family that conforms to the bus interface of the PowerPC 601ª, PowerPC 603ª, or PowerPC 604 microprocessors. Note that this does not include the PowerPC 602ª microprocessor which has a multiplexed address/data bus. 60x processors implement the PowerPC architecture as it is speciÞed for 32-bit addressing, which provides 32-bit effective (logical) addresses, integer data types of 8, 16, and 32 bits,and ßoating-point data types of 32 and 64 bits (single-precision and double-precision).1.1 Overview The MPC106 provides an integrated high-bandwidth, high-performance, TTL-compatible interface between a 60x processor, a secondary (L2) cache or additional (up to four total) 60x processors, the PCI bus,and main memory. This section provides a block diagram showing the major functional units of the 106 and describes brießy how those units interact.Figure 1 shows the major functional units within the 106. Note that this is a conceptual block diagram intended to show the basic features rather than an attempt to show how these features are physically implemented on the device.
上传时间： 2013-10-08
上传用户：18711024007
设计一种应用于某全地形ATV车载武器装置中的中控系统，该系统设计是以TMS320F2812型DSP为核心，采用模块化设计思想，对其硬件部分进行系统设计，能够完成对武器装置高低、回转方向的运动控制，实现静止或行进状态中对目标物的测距，自动瞄准以及按既定发射模式发射弹丸和各项安全性能检测等功能。通过编制相应的软件，对其进行系统调试，验证了该设计运行稳定。 Abstract: A central control system applied to an ATV vehicle weapons is designed. The system design is based on TMS320F2812 DSP as the core， uses modular design for its hardware parts. The central control system can complete the motion control of the level of weapons and equipment， rotation direction， to achieve a state of static or moving objects on the target ranging， auto-targeting and according to the established target and the projectile and the launch of the security performance testing and other functions. Through the development of appropriate software and to carry out system testing to verify the stability of this design and operation.
上传时间： 2013-11-02
上传用户：jshailingzzh
This application note describes how to build a system that can be used for determining theoptimal phase shift for a Double Data Rate (DDR) memory feedback clock. In this system, theDDR memory is controlled by a controller that attaches to either the OPB or PLB and is used inan embedded microprocessor application. This reference system also uses a DCM that isconfigured so that the phase of its output clock can be changed while the system is running anda GPIO core that controls that phase shift. The GPIO output is controlled by a softwareapplication that can be run on a PowerPC® 405 or Microblaze™ microprocessor.
上传时间： 2013-10-15
上传用户：euroford
针对嵌入式机器视觉系统向独立化、智能化发展的要求，介绍了一种嵌入式视觉系统--智能相机。基于对智能相机体系结构、组成模块和图像采集、传输和处理技术的分析，对国内外的几款智能相机进行比较。综合技术发展现状，提出基于FPGA+DSP模式的硬件平台，并提出智能相机的发展方向。分析结果表明，该系统设计可以实现脱离PC运行，完成图像获取与分析，并作出相应输出。 Abstract: This paper introduced an embedded vision system-intelligent camera ，which was for embedded machine vision systems to an independent and intelligent development requirements. Intelligent camera architecture， component modules and image acquisition， transmission and processing technology were analyzed. After comparing integrated technology development of several intelligent cameras at home and abroad， the paper proposed the hardware platform based on FPGA+DSP models and made clear direction of development of intelligent cameras. On the analysis of the design， the results indicate that the system can run from the PC independently to complete the image acquisition and analysis and give a corresponding output.
上传时间： 2013-10-24
上传用户：bvdragon
