C Programming for Microcontrollers : Featuring ATMEL’s AVR butterfly and the Free WinAVR Compiler : Joe Pardue SmileyMicros.com
标签： Microcontrollers Programming Featuring butterfly
上传时间： 2013-12-31
上传用户：jcljkh
In this paper, we describe the development of a mobile butterfly-watching learning (BWL) system to realize outdoor independent learning for mobile learners. The mobile butterfly-watching learning system was designed in a wireless mobile ad-hoc learning environment. This is first result to provide a cognitive tool with supporting the independent learning by applying PDA with wireless communication technology to extend learning outside of the classroom. Independent learning consists of self-selection, self-determination, self-modification, and self-checking.
标签： butterfly-watching development describe learning
上传时间： 2014-11-25
上传用户：waizhang
butterfly MP3源代码，完整的mp3自己制作源码
上传时间： 2015-10-03
上传用户：helmos
butterfly avrisp for atmel atmega
标签： butterfly avrisp atmega atmel
上传时间： 2016-02-07
上传用户：lyy1234
这是06年4月刚刚完成的程序，从opencore.org下载而来。用vhdl语言描写，以及matlab仿真，testbench，以及在xinlinx上的综合。 The MDCT core is two dimensional discrete cosine transform implementation designed for use in compression systems like JPEG. Architecture is based on parallel distributed arithmetic with butterfly computation.
标签： 程序
上传时间： 2013-12-16
上传用户：123啊
基于FPGA设计的相关论文资料大全 84篇用FPGA实现FFT的研究 刘朝晖 韩月秋 摘 要 目的 针对高速数字信号处理的要求，给出了用现场可编程门阵列(FPGA)实现的 快速傅里叶变换(FFT)方案.方法 算法为按时间抽取的基4算法，采用递归结构的块浮点运 算方案，蝶算过程只扩展两个符号位以适应雷达信号处理的特点，乘法器由阵列乘法器实 现.结果 采用流水方式保证系统的速度，使取数据、计算旋转因子、复乘、DFT等操作协 调一致，在计算、通信和存储间取得平衡，避免了瓶颈的出现.结论 实验表明，用FPGA 实现高速数字信号处理的算法是一个可行的方案. 关键词 离散傅里叶变换； 快速傅里叶变换； 块浮点运算； 可编程门阵列 分类号 TP39； TN957.511 Implementation of FFT with FPGA Technology Liu Zhaohui Han Yueqiu (Department of Electronics Engineering, Beijing Institute of Technology, Beijing 100081) Abstract Aim To propose a scheme for implementing FFT with FPGA in accor-dance with the requirement for high speed digital signal processing. Methods The structure of FPGA and requirement of system were considered in the experiment, radix-4 algorithm of DIT and recursive structure were adopted. The group float point arithmetic operation was used in the butterfly and the array multiplier was used to realize multiplication. Results The pipeline pattern was used to ensure the system speed, it made fetching data, calculating twiddle factor, complex multiplication and D
标签： fpga
上传时间： 2022-03-22
上传用户：lostxc
