TPSN时间同步算法，同步精度几百微秒 time synchronization in sensor network
上传时间： 2013-12-14
上传用户：heart520beat
This tutorial presents an introduction to Altera’s Nios R II processor, which is a soft processor that can be in- stantiated on an Altera FPGA device. It describes the basic architecture of Nios II and its instruction set. The NiosII processor and its associated memory and peripheral components are easily instantiated by using Altera’s SOPCBuilder in conjuction with the Quartus R II software.
标签： processor introduction tutorial presents
上传时间： 2014-12-08
上传用户：星仔
The SL11RIDE is a low cost, high speed Universal Serial Bus RISC based Controller board. It contains a 16-bit RISC processor with built in SL11RIDE ROM to greatly reduce firmware development efforts. Its serial flash EEPROM interface offers low cost storage for USB device configuration and customer product specific functions. New functions can be programmed into the I2C by downloading it from a USB Host PC. This unique architecture provides the ability to upgrade products, in the field, without changing the peripheral hardware.
标签： Controller Universal contains Serial
上传时间： 2014-01-06
上传用户：15071087253
In communication systems channel poses an important role. channels can convolve many different kind of distortions to our information. In perticular wireless channels multipath distortion is sevear. and more sevear is such distortion is random. To handle this, multipath affected channels require Equalizers at receaver end. such equalizer uses different learning Algorithms for identifying channels continuously. This project is VHDL implementation of LMS learning algorithm with pipelined architecture. so this implementation can work with higher data rates with less clock speed requirments and so with less power consumpiton It uses Fixed point arithmatic blocks for filtering so suitable for coustom asic.
标签： communication important different channels
上传时间： 2013-12-08
上传用户：litianchu
Besides enhanced looks and advanced features, one of the best things about Swing is its pluggable look and feel (PLAF). PLAF architecture allows seamless changes in the appearance of an application and the way an application interacts with the user. However, designing and developing a PLAF is much more exhaustive and complex. On the other hand, themes provide a simple alternative to change look and feel of the swing application. Themes are easier to implement and they enhance the visual appeal of the application UI using the default Java look and feel. Theme mechanism allows a developer to easily specify the default colors, fonts and icons used by the look and feel (L&F). It allows developers to write their own themes giving them a choice to show their application GUI the way they want it, rather than depending on the defaults provided by the system.
标签： pluggable enhanced advanced features
上传时间： 2014-01-23
上传用户：253189838
-- Hamming Decoder -- This Hamming decoder accepts an 8-bit Hamming code (produced by the encoder above) and performs single error correction and double error detection. -- download from: www.pld.com.cn & www.fpga.com.cn LIBRARY ieee USE ieee.std_logic_1164.ALL ENTITY hamdec IS PORT(hamin : IN BIT_VECTOR(0 TO 7) --d0 d1 d2 d3 p0 p1 p2 p4 dataout : OUT BIT_VECTOR(0 TO 3) --d0 d1 d2 d3 sec, ded, ne : OUT BIT) --diagnostic outputs END hamdec ARCHITECTURE ver1 OF hamdec IS BEGIN
标签： Hamming produced Decoder decoder
上传时间： 2017-07-15
上传用户：520
ARM System Developer s Guide: Designing and Optimizing System Software (The Morgan Kaufmann Series in Computer Architecture and Design)
标签： System Optimizing Developer Designing
上传时间： 2014-01-12
上传用户：gundan
A programmable digital signal processor (PDSP) is a special-purpose microprocessor with specialized architecture and instruction set for implementing DSP algorithms. Typical architectural features include multiple memory partitions (onchip, off-chip, data memory, program memory, etc.), multiple (generally pipelined) arithmetic and logic units (ALUs), nonuniform register sets, and extensive hardware numeric support [1,2]. Single-chip PDSPs have become increasingly popular for real-time DSP applications [3,4].
标签： special-purpose microprocessor programmable specialized
上传时间： 2017-08-13
上传用户：脚趾头
The Definitive Guide to SOA: Oracle® Service Bus, Second Edition targets professional software developers and architects who know enterprise development but are new to enterprise service buses (ESBs) and service–oriented architecture (SOA) development. This is the first book to cover a practical approach to SOA using the BEA AquaLogic Service Bus tool. And it’s written from the “source”—BEA Systems AquaLogic product lead Jeff Davies.
标签： professional Definitive software Edition
上传时间： 2014-01-22
上传用户：wpwpwlxwlx
While faster processors, larger memory, and powerful graphics are fundamental requirements for workstations, users are also demanding a low-cost, solution-based approach wrapped around a standards-based technology. The Sun UltraTM 20 Workstation, which leverages the AMD OpteronTM processor with Direct Connect Architecture based on AMD64 technology, provides multiple operating system choices and leading nVidia graphics, delivers a platform that offers flexibility and performance in a cost-effective package with solutions to benefit customers across the board.
标签： requirements fundamental processors graphics
上传时间： 2017-08-17
上传用户：zhaiye
