资料介绍说明： 1.本程序只在Windows XP 平台上经过完整测试，因此只能保证该程序在winXP系统下运行正确。 2.由于本程序使用了Access数据库，因此需要计算机安装有Microsoft Access。 3.将本程序下载到本地计算机后，需要建立与用户信息.mdb的ODBC链接。建立方法如下： 进入开始菜单 控制面板 管理工具 数据源(ODBC),建立一个新的"LVTest_UserB",数据库选择用户信息.mdb。点击ok完成设置。 4.运行虚拟电子称_陈锡辉.vi，输入用户名：admin，密码：123456 登陆系统。进入系统后可以更改密码或管理通用户等等。
上传时间： 2014-12-31
上传用户：yepeng139
松翰 C语言 编程 指导C +Program +Guide
上传时间： 2013-10-31
上传用户：zhaistone
FPGA推荐好书免费下载
上传时间： 2013-11-06
上传用户：hebanlian
AXI Reference Guide (AXI).pdf
上传时间： 2013-10-29
上传用户：libinxny
Nios II 系列处理器配置选项:This chapter describes the Nios® II Processor parameter editor in Qsys and SOPC Builder. The Nios II Processor parameter editor allows you to specify the processor features for a particular Nios II hardware system. This chapter covers the features of the Nios II processor that you can configure with the Nios II Processor parameter editor; it is not a user guide for creating complete Nios II processor systems.
上传时间： 2015-01-01
上传用户：mahone
This application note provides a detailed description of the Spartan™-3 configurationarchitecture. It explains the composition of the bitstream file and how this bitstream isinterpreted by the configuration logic to program the part. Additionally, a methodology ispresented that will guide the user through the readback process. This information can be usedfor partial reconfiguration or partial readback.
上传时间： 2013-11-16
上传用户：qingdou
Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the developmentof designs to operate with Xilinx hardware devices. You may not reproduce, distribute, republish, download, display, post, or transmit theDocumentation in any form or by any means including, but not limited to, electronic, mechanical, photocopying, recording, or otherwise,without the prior written consent of Xilinx. Xilinx expressly disclaims any liability arising out of your use of the Documentation. Xilinx reservesthe right, at its sole discretion, to change the Documentation without notice at any time. Xilinx assumes no obligation to correct any errorscontained in the Documentation, or to advise you of any corrections or updates. Xilinx expressly disclaims any liability in connection withtechnical support or assistance that may be provided to you in connection with the Information.
上传时间： 2013-11-11
上传用户：zwei41
The PPC405 Virtex-4 is a wrapper around the Virtex-4PowerPC™ 405 Processor Block primitive. For detailsregarding the PowerPC 405, see the PowerPC 405 ProcessorBlock Reference Guide.
上传时间： 2015-01-02
上传用户：JIUSHICHEN
This document was developed under the Standard Hardware and Reliability Program (SHARP) TechnologyIndependent Representation of Electronic Products (TIREP) project. It is intended for use by VHSIC HardwareDescription Language (VHDL) design engineers and is offered as guidance for the development of VHDL modelswhich are compliant with the VHDL Data Item Description (DID DI-EGDS-80811) and which can be providedto manufacturing engineering personnel for the development of production data and the subsequent productionof hardware. Most VHDL modeling performed to date has been concentrated at either the component level orat the conceptual system level. The assembly and sub-assembly levels have been largely disregarded. Under theSHARP TIREP project, an attempt has been made to help close this gap. The TIREP models are based upon lowcomplexity Standard Electronic Modules (SEM) of the format A configuration. Although these modules are quitesimple, it is felt that the lessons learned offer guidance which can readily be applied to a wide range of assemblytypes and complexities.
上传时间： 2013-11-20
上传用户：pzw421125
这篇文章讨论了不同HDL代码的编写方式，对综合结果的影响。阅读本文对深入了解综合工具和提高HDL的编写水平有不少帮助，原文时针对Synopsys的综合软件论述的，但对所有综合软件，都有普遍的借鉴意义
标签： Synthesis Coding Styles Guide
上传时间： 2014-01-11
上传用户：亚亚娟娟123
