源码文件
[LB1 = 1 : LB2 = 1] No memory lock features enabled. [LB1 = 0 : LB2 = 1] Further programming of Flash and EEPROM is enabled. [LB…
XML+parsing 源代码
汇集 XML+parsing 相关的电路原理图、PCB工程文件、单片机/FPGA源代码、数据手册与应用设计方案。
收录资源 500 份
全站深度检索
共匹配 500 份工程资源
· 第 11 / 50 页
源码文件
8 CKDIV8 Divide clock by 8 0 CKOUT Clock output 1 SUT1 Select sta…
源码文件
[LB1 = 1 : LB2 = 1] No memory lock features enabled. [LB1 = 0 : LB2 = 1] Further programming of Flash and EEPROM is enabled. [LB…
源码文件
[LB1 = 1 : LB2 = 1] No memory lock features enabled. [LB1 = 0 : LB2 = 1] Further programming of Flash and EEPROM is enabled. [LB…
源码文件
3 0x20 0x00 Serial program downloading (SPI) enabled 0x01 0x00 Internal RC oscillator…
源码文件
8 CKDIV8 Divide clock by 8 0 CKOUT Clock output 1 SUT1 Select sta…
源码文件
[LB1 = 1 : LB2 = 1] No memory lock features enabled. [LB1 = 0 : LB2 = 1] Further programming of Flash and EEPROM is enabled. [LB…
源码文件
[LB1 = 1 : LB2 = 1] No memory lock features enabled. [LB1 = 0 : LB2 = 1] Further programming of Flash and EEPROM is enabled. [LB…
源码文件
2 SPIEN Serial Program Downloading Enabled FSTRT Short Start-up time selected 2 …
源码文件
[LB1 = 1 : LB2 = 1] No memory lock features enabled. [LB1 = 0 : LB2 = 1] Further programming of Flash and EEPROM is enabled. [LB…