wishbone总线的VHDL源代码 wishbone适用于与FPGA中IP核的高速通信
wishbone总线的VHDL源代码 wishbone适用于与FPGA中IP核的高速通信，其接口简单，速度快 成为ip通信的主流...
Wishbone技术资料
📦 资源总数：37
💻 源代码：790
🔌 电路图：1
📚 Wishbone全部资料 (37个)
VHDL MAC wishbone VHDL MAC wishbone
VHDL MAC wishbone VHDL MAC wishbone...
opencore ahb to wishbone bus verilog code
opencore ahb to wishbone bus verilog code...
Wishbone to LPC (Low-Pin Count) Bridge, includes master and slave modules. Supports 8-bit I/O Read a
Wishbone to LPC (Low-Pin Count) Bridge, includes master and slave modules. Supports 8-bit I/O Read a...
This is is a bridge IP core to interface the Tensilica PIF bus protocol with the OpenCores WishBone.
This is is a bridge IP core to interface the Tensilica PIF bus protocol with the OpenCores WishBone....
SD卡控制器IP. 兼容SD卡协议2.0。与wishbone bus 接口
SD卡控制器IP. 兼容SD卡协议2.0。与wishbone bus 接口，方便与其他IP连接使用。...
单片机应用技术选编11
单片机应用技术选编(11) 目录 第一章 专题论述 1.1 3种嵌入式操作系统的分析与比较(2) 1.2 KEIL RTX51 TINY内核的分析与应用(8) 1.3 中间件技术及其发...
soc中ip核集成时所采用的一种片上总线
soc中ip核集成时所采用的一种片上总线，开发的，为opencores所采用，wishbone片上总线指南...
一个简单的ＳＰＩ ＩＰ核
一个简单的ＳＰＩ ＩＰ核，SPI Core Specifications 可以从说明文档中找到！ The simple Serial Peripheral Interface core is an ...
This demo shows how to use MATLAB, Optimization Toolbox, and Genetic Algorithm and Direct Search Too
This demo shows how to use MATLAB, Optimization Toolbox, and Genetic Algorithm and Direct Search Too...