嵌入式CAN模块 联系 杨迪 15336417867 0531-55508458 QQ：1347978253 htp://www.easyele.cn CAN (Controller Area Network)即控制器局域网络,属于工业现场总线的范畴。与一般的通信总线相比,CAN总线的数据通信具有突出的可靠性 、实时性和灵活性。嵌入式CAN模块控制器功能强，通信效率高,是公认的稳定可靠的通讯模式，广泛应用于消防安防、智能楼宇、酒店门锁、 煤矿通讯、船舶运输等应用领域。本系统采汽车级CPU，更保障其稳定性。客户可以放心使用。 嵌入式CAN模块 转 RS232 RS485 TTL ，可以帮助用户快速实现具有CAN-bus通讯接口的仪器、仪表设备的项目设计，模块集成了8bit微处理器 CAN控制器、CAN收发器、总线保护于一身，所有元器件布置在一个微型的封装模块之内，用户只需要知道RS232的通讯即可实现CAN通讯。客户 可以方便使用。 在使用过程中，嵌入式CAN模块可以工作于二种模式：透明传输模式和透明数据模式。并且提供上位机设计，UART输出时可以为TTL电平，RS232 或RS485，对应订货型号为 CAN-module-ttl / rs232 / 485。客户应注意。 嵌入式CAN模块可以在CAN与RS232间精确的转换信息，让您更方便的通过PC或带RS232端口的设备与CAN设备通讯。欢迎大家咨询选购嵌入式CAN 模块，是我公司自主研发生产，完全拥有知识产权，专业的产品包装，详细的资料光盘，性价比高，专业公司操作，及时的技术支持，完善的 售后服务，解决客户的后顾之忧。
上传时间： 2013-11-28
上传用户：13925096126
NXP Semiconductor designed the LPC2400 microcontrollers around a 16-bit/32-bitARM7TDMI-S CPU core with real-time debug interfaces that include both JTAG andembedded Trace. The LPC2400 microcontrollers have 512 kB of on-chip high-speedFlash memory. This Flash memory includes a special 128-bit wide memory interface andaccelerator architecture that enables the CPU to execute sequential instructions fromFlash memory at the maximum 72 MHz system clock rate. This feature is available onlyon the LPC2000 ARM Microcontroller family of products. The LPC2400 can execute both32-bit ARM and 16-bit Thumb instructions. Support for the two Instruction Sets meansEngineers can choose to optimize their application for either performance or code size atthe sub-routine level. When the core executes instructions in Thumb state it can reducecode size by more than 30 % with only a small loss in performance while executinginstructions in ARM state maximizes core performance.
上传时间： 2013-11-15
上传用户：zouxinwang
CAN，全称为“Controller Area Network”，即控制器局域网，是国际上应用最广泛的现场总线之一。最初，CAN被设计作为汽车环境中的微控制器通讯，在车载各电子控制装置ECU之间交换信息，形成汽车电子控制网络。比如：发动机管理系统、变速箱控制器、仪表装备、电子主干系统中，均嵌入CAN控制装置。一个由CAN 总线构成的单一网络中，理论上可以挂接无数个节点。实际应用中，节点数目受网络硬件的电气特性所限制。例如，当使用Philips P82C250作为CAN收发器时，同一网络中允许挂接110个节点。CAN 可提供高达1Mbit/s的数据传输速率，这使实时控制变得非常容易。另外，硬件的错误检定特性也增强了CAN的抗电磁干扰能力。
上传时间： 2013-11-17
上传用户：thuyenvinh
C51使用手册 .pdf 第二节内存区域(Memory Areas)1. Pragram Area由Code 说明可有多达64kBytes 的程序存储器2. Internal Data Memory:内部数据存储器可用以下关键字说明data 直接寻址区为内部RAM 的低128 字节00H 7FHidata 间接寻址区 包括整个内部RAM 区00H FFHbdata 可位寻址区 20H 2FH3. External Data Memory外部RAM 视使用情况可由以下关键字标识xdata 可指定多达64KB 的外部直接寻址区地址范围0000H 0FFFFHpdata 能访问1 页(25bBytes)的外部RAM 主要用于紧凑模式(Compact Model)4. Speciac Function Register Memory
上传时间： 2013-11-19
上传用户：busterman
FeaturesThe following standard features are provided.• Choice of RTOS scheduling policy1. Pre-emptive:Always runs the highest available task. Tasks of identical priorityshare CPU time (fully pre-emptive with round robin time slicing).2. Cooperative:Context switches only occur if a task blocks, or explicitly callstaskYIELD().• Co-routines (light weight tasks that utilise very little RAM).• Message queues• Semaphores [via macros]• Trace visualisation ability (requires more RAM)• Majority of source code common to all supported development tools• Wide range of ports and examples
上传时间： 2013-10-13
上传用户：13162218709
The TJA1042 is a high-speed CAN transceiver that provides an interface between aController Area Network (CAN) protocol controller and the physical two-wire CAN bus.The transceiver is designed for high-speed (up to 1 Mbit/s) CAN applications in theautomotive industry, providing the differential transmit and receive capability to (amicrocontroller with) a CAN protocol controller.
标签： High-speed transce 1042 TJA
上传时间： 2014-12-28
上传用户：气温达上千万的
The TJA1051 is a high-speed CAN transceiver that provides an interface between aController Area Network (CAN) protocol controller and the physical two-wire CAN bus.The transceiver is designed for high-speed (up to 1 Mbit/s) CAN applications in theautomotive industry, providing differential transmit and receive capability to (amicrocontroller with) a CAN protocol controller.
标签： High-speed transce 1051 TJA
上传时间： 2013-10-17
上传用户：jisujeke
All inputs of the C16x family have Schmitt-Trigger input characteristics. These Schmitt-Triggers are intended to always provide proper internal low and high levels, even if anundefined voltage level (between TTL-VIL and TTL-VIH) is externally applied to the pin.The hysteresis of these inputs, however, is very small, and can not be properly used in anapplication to suppress signal noise, and to shape slow rising/falling input transitions.Thus, it must be taken care that rising/falling input signals pass the undefined area of theTTL-specification between VIL and VIH with a sufficient rise/fall time, as generally usualand specified for TTL components (e.g. 74LS series: gates 1V/us, clock inputs 20V/us).The effect of the implemented Schmitt-Trigger is that even if the input signal remains inthe undefined area, well defined low/high levels are generated internally. Note that allinput signals are evaluated at specific sample points (depending on the input and theperipheral function connected to it), at that signal transitions are detected if twoconsecutive samples show different levels. Thus, only the current level of an input signalat these sample points is relevant, that means, the necessary rise/fall times of the inputsignal is only dependant on the sample rate, that is the distance in time between twoconsecutive evaluation time points. If an input signal, for instance, is sampled throughsoftware every 10us, it is irrelevant, which input level would be seen between thesamples. Thus, it would be allowable for the signal to take 10us to pass through theundefined area. Due to the sample rate of 10us, it is assured that only one sample canoccur while the signal is within the undefined area, and no incorrect transition will bedetected. For inputs which are connected to a peripheral function, e.g. capture inputs, thesample rate is determined by the clock cycle of the peripheral unit. In the case of theCAPCOM unit this means a sample rate of 400ns @ 20MHz CPU clock. This requiresinput signals to pass through the undefined area within these 400ns in order to avoidmultiple capture events.For input signals, which do not provide the required rise/fall times, external circuitry mustbe used to shape the signal transitions.In the attached diagram, the effect of the sample rate is shown. The numbers 1 to 5 in thediagram represent possible sample points. Waveform a) shows the result if the inputsignal transition time through the undefined TTL-level area is less than the time distancebetween the sample points (sampling at 1, 2, 3, and 4). Waveform b) can be the result ifthe sampling is performed more than once within the undefined area (sampling at 1, 2, 5,3, and 4).Sample points:1. Evaluation of the signal clearly results in a low level2. Either a low or a high level can be sampled here. If low is sampled, no transition willbe detected. If the sample results in a high level, a transition is detected, and anappropriate action (e.g. capture) might take place.3. Evaluation here clearly results in a high level. If the previous sample 2) had alreadydetected a high, there is no change. If the previous sample 2) showed a low, atransition from low to high is detected now.
上传时间： 2013-10-23
上传用户：copu
All inputs of the C16x family have Schmitt-Trigger input characteristics. These Schmitt-Triggers are intended to always provide proper internal low and high levels, even if anundefined voltage level (between TTL-VIL and TTL-VIH) is externally applied to the pin.The hysteresis of these inputs, however, is very small, and can not be properly used in anapplication to suppress signal noise, and to shape slow rising/falling input transitions.Thus, it must be taken care that rising/falling input signals pass the undefined area of theTTL-specification between VIL and VIH with a sufficient rise/fall time, as generally usualand specified for TTL components (e.g. 74LS series: gates 1V/us, clock inputs 20V/us).The effect of the implemented Schmitt-Trigger is that even if the input signal remains inthe undefined area, well defined low/high levels are generated internally. Note that allinput signals are evaluated at specific sample points (depending on the input and theperipheral function connected to it), at that signal transitions are detected if twoconsecutive samples show different levels. Thus, only the current level of an input signalat these sample points is relevant, that means, the necessary rise/fall times of the inputsignal is only dependant on the sample rate, that is the distance in time between twoconsecutive evaluation time points. If an input signal, for instance, is sampled throughsoftware every 10us, it is irrelevant, which input level would be seen between thesamples. Thus, it would be allowable for the signal to take 10us to pass through theundefined area. Due to the sample rate of 10us, it is assured that only one sample canoccur while the signal is within the undefined area, and no incorrect transition will bedetected. For inputs which are connected to a peripheral function, e.g. capture inputs, thesample rate is determined by the clock cycle of the peripheral unit. In the case of theCAPCOM unit this means a sample rate of 400ns @ 20MHz CPU clock. This requiresinput signals to pass through the undefined area within these 400ns in order to avoidmultiple capture events.
上传时间： 2014-04-02
上传用户：han_zh
I2C interface, is a very powerful tool for system designers. Theintegrated protocols allow systems to be completely software defined.Software development time of different products can be reduced byassembling a library of reusable software modules. In addition, themultimaster capability allows rapid testing and alignment ofend-products via external connections to an assembly-line computer.The mask programmable 87LPC76X and its EPROM version, the87LPC76X, can operate as a master or a slave device on the I2Csmall area network. In addition to the efficient interface to thededicated function ICs in the I2C family, the on-board interfacefacilities I/O and RAM expansion, access to EEPROM andprocessor-to-processor communications.
标签： microcontro Using 76X LPC
上传时间： 2013-12-30
上传用户：Artemis
