Verilog-A
Verilog-A,作为模拟电路设计的高级语言,专为精确建模半导体器件及材料特性而生。它支持连续时间系统仿真,广泛应用于集成电路、传感器与MEMS的设计中。掌握Verilog-A不仅能够提升您的模拟电路设计能力,还能帮助您深入理解底层物理机制。本站提供15100个精选Verilog-A资源,涵盖从基...
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查看全部 9,971 份 →it is a verilog code written for FIFO in modelsim simulator and it will synthesize in xinlix ise 8
it is a verilog code written for FIFO in modelsim simulator and it will synthesize in xinlix ise 8.2i.i have tested it...
2014-06-26
132
Clock_Dithering_Verilog this is a Clock u_dither, 大家想要做Verilog去抖动的可以参考.
Clock_Dithering_Verilog this is a Clock u_dither, 大家想要做Verilog去抖动的可以参考.
2013-12-09
126