UART+interrupt 热门资料

it is a verilog code written for MELAY state machine based UART and it wll synthesize in xinlix ise 8.2i.i have tested it om my ki…

用VHDL实现的一个uart控制器，输入时钟为33M

基于FPGA的uart源代码，异步串行通信，vhdl书写的。

Hardware Design with VHDL Design Example: UART

电子书：《UART在GPS导航系统中的应用》

自己在ISE下用VHDL写的UART，简单，易懂

一个在FPGA芯片上实现UART功能的vhdl源代码，提供了UART的集成

Abstract: The MAX3108 is a complete high-performance universal asynchronous receiver-transmitter (UART) in a tiny 2.1mm ×

Based on the Godson-1 32-bit chip embedded SOC manuals, to provide MAC, UART, I2C, SPI, LCD, SDRAM, NAND FLASH, such as interface

关于ucos下的 UART串口驱动实现 硬件平台是LPC2114