A set of C++ and Matlab routines implementing the surfacelet transform
标签： implementing surfacelet transform routines
上传时间： 2016-09-23
上传用户：frank1234
Keil uVision3例证代码NOMOD51 This file is part of the C51 Compiler package Copyright (c) 1988-2005 Keil Elektronik GmbH and Keil Software, Inc. Version 8.01
标签： Copyright Compiler uVision3 package
上传时间： 2014-11-26
上传用户：baiom
μC/OS-II for the LuminaryMicro LM3S8
标签： LuminaryMicro OS-II LM3S8 for
上传时间： 2013-12-22
上传用户：asdfasdfd
This book is for you if You re no "dummy," and you need to get quickly up to speed in intermediate to advanced C++ You ve had some experience in C++ programming, but reading intermediate and advanced C++ books is slow-going You ve had an introductory C++ course, but you ve found that you still can t follow your colleagues when they re describing their C++ designs and code You re an experienced C or Java programmer, but you don t yet have the experience to develop nuanced C++ code and designs You re a C++ expert, and you re looking for an alternative to answering the same questions from your less-experienced colleagues over and over again C++ Common Knowledge covers essential but commonly misunderstood topics in C++ programming and design while filtering out needless complexity in the discussion of each topic. What remains is a clear distillation of the essentials required for production C++ programming, presented in the author s trademark incisive, engaging style.
标签： intermediate you quickly dummy
上传时间： 2014-01-09
上传用户：wpwpwlxwlx
myson803.c: A Linux device driver for the Myson mtd803 Ethernet chip.
标签： 803 Ethernet device driver
上传时间： 2013-12-17
上传用户：nairui21
Vc++入门的捷径 一些c++的小问题 以及代码大全 maybe something about the difficulty in studying C
标签： difficulty something studying maybe
上传时间： 2016-10-11
上传用户：fxf126@126.com
A clock writing by Verilog which can count from 00:00 to 23:59. With a C file to see the simulation results. A co-design example of C and Verilog.
标签： simulation Verilog writing clock
上传时间： 2016-10-12
上传用户：王者A
A code writing by Verilog which can find medium value. With a C file to see the simulation results. A co-design example of C and Verilog.
标签： simulation Verilog writing results
上传时间： 2014-11-18
上传用户：ljt101007
As the source code name, this code is writing in Verilog and also inside the folder there is a c code to see the simulation results from verilog.
上传时间： 2013-12-27
上传用户：wangdean1101
This book is the product of a twenty-year resarch project at Rice University to develop fundamental compiler technologies for vector and parallel computer systems. The effort was by Randy Allen and Ken Kennedy with the help of David Kuck and Michael Wolfe.
标签： fundamental twenty-year University develop
上传时间： 2016-10-16
上传用户：yiwen213
