📚 SoC-Wishbone技术资料

📦 资源总数：402

📄 技术文档：1

💻 源代码：2518

🔌 电路图：1

Soc-Wishbone作为高效片上系统互连标准，广泛应用于嵌入式系统、微处理器设计及FPGA开发中。它以其简洁的协议、强大的可扩展性和低功耗特性著称，是构建复杂SoC架构的理想选择。无论您是初学者还是经验丰富的工程师，本页面提供的402个精选资源都将帮助您深入理解Wishbone总线的工作原理及其在实际项目中的应用技巧，加速您的技术成长与创新实践。

🔥 SoC-Wishbone热门资料

查看全部402个资源 »

Soc Design for h.264

Soc Design for h.264...

📅 2017-06-04 👤 海陆空653

Design Soc 264 for

SE-Candence SOC Encounter工具使用设计流程

SE-Candence SOC Encounter工具使用设计流程，源于一项项目...

📅 2017-06-09 👤 爺的气质

SE-Candence Encounter SOC 设计流程

Wishbone to LPC (Low-Pin Count) Bridge, includes master and slave modules. Supports 8-bit I/O Read a

Wishbone to LPC (Low-Pin Count) Bridge, includes master and slave modules. Supports 8-bit I/O Read and Write cycles, 8-bit Memory Read/Write cycles, D...

📅 2014-12-20 👤 古谷仁美

Wishbone Supports includes Low-Pin

This is is a bridge IP core to interface the Tensilica PIF bus protocol with the OpenCores WishBone.

This is is a bridge IP core to interface the Tensilica PIF bus protocol with the OpenCores WishBone. It currently supports single-cycle as well as bur...

📅 2013-12-21 👤 gonuiln

Tensilica OpenCores interface the