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This a CY7C68013 (USB2.0 Chip) Configuration example for Slave FIFO Mode with Sync Signal.
This an USB2.0 chip CY7C68013 Configuraion Example for Slave FIFO mode with "async" mode.
Slave mode FX2LP Firmware for raw-data transfer from an external master (altera FPGA)
code for i2c communication between master and slave in a system using AVR MCU
此资源是Ethercat 从站协议生成工具，可方便的生成从站协议代码，配合LAN9252的相关工具和资料，能方便的地实现Ethercat从机。
liblinphone is a high level library to make a SIP phone. This library includes ALL the features of linphone. It is des...
Package of C library extensions for Windows CE operating system. It is a supplement to C library available on Windows CE...
Cryptest (MFC Style Crypto++ v4.2 Library GUI).