一个verilog语言描写的同步fifo,包括:Fifo using declared registers for storage和Fifo using (model of) standard mem
一个verilog语言描写的同步fifo,包括:Fifo using declared registers for storage和Fifo using (model of) standard memory chip for storage.两种方式,包含testbench...
一个verilog语言描写的同步fifo,包括:Fifo using declared registers for storage和Fifo using (model of) standard memory chip for storage.两种方式,包含testbench...
The PCI Utilities package contains a library for portable access to PCI bus configuration registers and several utilities based on this library. I...
I2C Slave module The module contains N accessable Registers when in read Process, all Registers are read at a time when in write Process, only th...
st7109的datasheet,all hardware and registers is in...
MSP-FET430P140 Demo - USART0, SPI Interface to HC165/164 Shift Registers Description: Demonstrate USART0 in two-way SPI mode. Data are read from a...