一个verilog语言描写的同步fifo,包括:Fifo using declared Registers for storage和Fifo using (model of) standard memory chip for storage.两种方式,包含testbench
标签: using Fifo Registers declared
上传时间: 2015-12-15
上传用户:Avoid98
The PCI Utilities package contains a library for portable access to PCI bus configuration Registers and several utilities based on this library. In runs on the following systems: Linux (via /sys/bus/pci, /proc/bus/pci or i386 ports) FreeBSD (via /dev/pci) NetBSD (via libpci) OpenBSD (via /dev/pci) GNU/kFreeBSD (via /dev/pci) Solaris/i386 (direct port access) Aix (via /dev/pci and odmget) GNU Hurd (direct port access) Windows (direct port access)
标签: configuration PCI Utilities Registers
上传时间: 2016-01-19
上传用户:徐孺
I2C Slave module The module contains N accessable Registers when in read Process, all Registers are read at a time when in write Process, only the addressed register are Writeable.
标签: Registers module accessable contains
上传时间: 2016-05-13
上传用户:xauthu
st7109的datasheet,all hardware and Registers is in
标签: datasheet Registers hardware 7109
上传时间: 2016-08-06
上传用户:anng
MSP-FET430P140 Demo - USART0, SPI Interface to HC165/164 Shift Registers Description: Demonstrate USART0 in two-way SPI mode. Data are read from an HC165, and same data written back to the HC164. ACLK = n/a MCLK = SMCLK = default DCO = UCLK0 = DCO/2 * USART0 control bits are in different SFR s from other MSP430 s *
标签: Description Demonstrate Interface Registers
上传时间: 2013-12-27
上传用户:懒龙1988
this is ram both asynchronous and synchronous reset signals which is basic for any Registers and basic memory element
标签: asynchronous synchronous and Registers
上传时间: 2017-04-23
上传用户:cc1915
MSP430f2013 ADC, LCD drivers using 74168 shift Registers
标签: Registers drivers 74168 f2013
上传时间: 2013-12-30
上传用户:许小华
PCI-Express Lane Test Utility. Validates negotiated lane capability Registers, returns error codes, supports multiple vendor/device ID s
标签: PCI-Express negotiated capability Validates
上传时间: 2013-12-21
上传用户:hwl453472107
■ High Performance, Low Power AVR® 8-Bit Microcontroller ■ Advanced RISC Architecture –120 Powerful Instructions – Most Single Clock Cycle Execution –32 x 8 General Purpose Working Registers –Fully Static Operation
标签: Atmel
上传时间: 2013-06-01
上传用户:tccc
These 8-bit shift Registers feature gated serial inputs andan asynchronous clear. A LOW logic le
上传时间: 2013-06-12
上传用户:qq521