The LTC®4099 high effi ciency USB power manager andLi-Ion/Polymer battery charger seamlessly managespower distribution from multiple sources in portableapplications. It is differentiated from other USB powermanagers by its bidirectional I2C port that allows the hostmicroprocessor to control and monitor all aspects of theUSB power management and battery charging Processes.In addition, a programmable interrupt generation functionalerts the host microprocessor to changes in device statusand provides unprecedented control of power managementfunctions. This high degree of confi gurability allowspost-layout changes in operation, even changes in thefi eld, and it allows a single qualifi ed device to be usedin a variety of products, thus reducing design time andeasing inventory management.
上传时间： 2013-10-22
上传用户：18602424091
针对当前安检力学试验机所能完成的试验种类单一、自动化程度低等问题，提出一种以ATmega128单片机为核心控制器的安检力学试验机的设计。详细阐述了该安检力学试验机各个组成部分的设计原理和方案，并且给出了各部分的软件设计思想和操作流程。经过大量测试试验表明：设计的安检力学试验机可以完成多达十余种的力学安检试验，完全符合相关国家标准，并且具有数据采集精度高、传输速度快、操作安全简便等特点，实现了安检设备的多功能化、数字化和自动化。 Abstract: Currently， many mechanical security testing machines have only one function. The degree of automation of them is low. To solve those problems， a new kind of mechanical security testing machine， using ATmega128 micro-controller as its core controller， has been advanced. It describes the components of the machine. The principles and the scheme in the designing Processes are presented in detail， and the software architecture and the operation Processes of each part are given. After having done many testing， we have reached the following conclusions: the mechanical security testing machine presented can do over ten mechanical security tests complying with related national standards. It has high data acquisition accuracy and high transmission speed. The operation of the machine is simple and safe. In general， this machine is a multi-functional， highly automatic， digitalized security testing device.
上传时间： 2013-11-05
上传用户：a67818601
Field Programmable Gate Arrays (FPGAs) are becoming a critical part of every system design. Many vendors offer many different architectures and Processes. Which one is right for your design? How do you design one of these so that it works correctly and functions as you expect in your entire system? These are the questions that this paper sets out to answer.
上传时间： 2013-10-29
上传用户：lixqiang
The field of microelectromechanical systems (MEMS), particularly micromachinedmechanical transducers, has been expanding over recent years, and the productioncosts of these devices continue to fall. Using materials, fabrication Processes, anddesign tools originally developed for the microelectronic circuits industry, newtypes of microengineered device are evolving all the time—many offering numerousadvantages over their traditional counterparts. The electrical properties of siliconhave been well understood for many years, but it is the mechanical properties thathave been exploited in many examples of MEMS. This book may seem slightlyunusual in that it has four editors. However, since we all work together in this fieldwithin the School of Electronics and Computer Science at the University of Southampton,it seemed natural to work together on a project like this. MEMS are nowappearing as part of the syllabus for both undergraduate and postgraduate coursesat many universities, and we hope that this book will complement the teaching thatis taking place in this area.
上传时间： 2013-10-16
上传用户：朗朗乾坤
Abstract: Standard PCB design and mounting Processes can adversely influence MEMS inertial sensors.This application note contains guidelines for the layout, soldering, and mounting of MEMS inertialsensors in LGA packages in order to reduce stresses and improve functionality.
上传时间： 2014-01-15
上传用户：sjb555
IP核生成文件：（Xilinx/Altera 同） IP核生成器生成 ip 后有两个文件对我们比较有用，假设生成了一个 asyn_fifo 的核，则asyn_fifo.veo 给出了例化该核方式（或者在 Edit－》Language Template-》COREGEN 中找到verilog/VHDL 的例化方式）。asyn_fifo.v 是该核的行为模型，主要调用了 xilinx 行为模型库的模块，仿真时该文件也要加入工程。（在 ISE中点中该核，在对应的 Processes 窗口中运行“ View Verilog Functional Model ”即可查看该 .v 文件）。如下图所示。
上传时间： 2013-10-20
上传用户：lingfei
Field Programmable Gate Arrays (FPGAs) are becoming a critical part of every system design. Many vendors offer many different architectures and Processes. Which one is right for your design? How do you design one of these so that it works correctly and functions as you expect in your entire system? These are the questions that this paper sets out to answer.
上传时间： 2013-10-22
上传用户：lmq0059
IP核生成文件：（Xilinx/Altera 同） IP核生成器生成 ip 后有两个文件对我们比较有用，假设生成了一个 asyn_fifo 的核，则asyn_fifo.veo 给出了例化该核方式（或者在 Edit－》Language Template-》COREGEN 中找到verilog/VHDL 的例化方式）。asyn_fifo.v 是该核的行为模型，主要调用了 xilinx 行为模型库的模块，仿真时该文件也要加入工程。（在 ISE中点中该核，在对应的 Processes 窗口中运行“ View Verilog Functional Model ”即可查看该 .v 文件）。如下图所示。
上传时间： 2013-11-02
上传用户：谁偷了我的麦兜
This module can be used to interface to the MMC card in MMC or * SPI modes. It supports a multiple card environment. The reset and * identification Processes assume multiple cards on the bus. * In MMC mode, the card number is used as the RCA operand in the * commands.
标签： MMC interface multiple supports
上传时间： 2014-01-07
上传用户：qilin
Support is available from MIPS Technologies Inc. - problems should be addressed to support@mips.com。This product may be controlled for export purposes. You may not export, or transfer for the purpose of reexport, any technical data received hereunder or the product produced by use of such technical data, including Processes and services (the "product"), in violation of any U.S. or foreign regulation, treaty, Executive Order, law, statute, amendment or supplement thereto. Further, you may not export the product to any prohibited or embargoed country or to any denied, blocked, or designated person or entity as mentioned in any applicable U.S. or foreign regulation, treaty, Executive Order, law, statute, amendment or supplement thereto.
标签： Technologies available addressed problems
上传时间： 2014-01-24
上传用户：二驱蚊器
