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Peripherals

  • XA-S3的IIC接口的驱动器软件程序(C语言)

    The XA-S3 is a member of Philips Semiconductors’ XA (eXtended Architecture) family of high performance 16-bit single-chip Microcontrollers. The XA-S3 combines many powerful Peripherals on one chip. Therefore, it is suited for general multipurpose high performance embedded control functions.One of the on-chip Peripherals is the I2C bus interface. This report describes worked-out driver software (written in C) to program / use the I2C interface of the XA-S3. The driver software, together with a demo program and interface software routines offer the user a quick start in writing a complete I2C - XAS3 system application.

    标签: XA-S IIC C语言 接口

    上传时间: 2013-11-10

    上传用户:liaofamous

  • 3.3v看门狗芯片

    The STWD100 watchdog timer circuits are self-contained devices which prevent systemfailures that are caused by certain types of hardware errors (non-responding Peripherals,bus contention, etc.) or software errors (bad code jump, code stuck in loop, etc.).The STWD100 watchdog timer has an input, WDI, and an output, WDO (see Figure 2). Theinput is used to clear the internal watchdog timer periodically within the specified timeoutperiod, twd (see Section 3: Watchdog timing). While the system is operating correctly, itperiodically toggles the watchdog input, WDI. If the system fails, the watchdog timer is notreset, a system alert is generated and the watchdog output, WDO, is asserted (seeSection 3: Watchdog timing).The STWD100 circuit also has an enable pin, EN (see Figure 2), which can enable ordisable the watchdog functionality. The EN pin is connected to the internal pull-downresistor. The device is enabled if the EN pin is left floating.

    标签: 3.3 看门狗 芯片

    上传时间: 2013-10-22

    上传用户:taiyang250072

  • pk51下载 (8051单片机开发工具)

    PK51是为8051系列单片机所设计的开发工具,支持所有8051系列衍生产品,,支持带扩展存储器和扩展指令集(例如Dallas390/5240/400,Philips 51MX,Analog Devices MicroConverters)的新设备,以及支持很多公司的一流的设备和IP内核,比如Analog Devices, Atmel, Cypress Semiconductor, Dallas Semiconductor, Goal, Hynix, Infineon, Intel, NXP(founded by Philips), OKI, Silicon Labs,SMSC, STMicroeleectronics,Synopsis, TDK, Temic, Texas Instruments,Winbond等。通过PK51专业级开发工具,可以轻松地了解8051的On-chip Peripherals与及其它关键特性。    

    标签: 8051 pk 51

    上传时间: 2013-10-09

    上传用户:1109003457

  • Dsp281x外设资料

    This overview guide describes all the Peripherals available for TMS320x28xx and TMS320x28xxx devices.Section 2 shows the Peripherals used by each device. Section 3 provides descriptions of the Peripherals.You can download the peripheral guide by clicking on the literature number, which is linked to the portable document format (pdf) file.

    标签: 281x Dsp 281 外设

    上传时间: 2013-11-21

    上传用户:HGH77P99

  • C51 V8 专业开发工具

    Keil C51 V8 专业开发工具(PK51)   PK51是为8051系列单片机所设计的开发工具,支持所有8051系列衍生产品,,支持带扩展存储器和扩展指令集(例如Dallas390/5240/400,Philips 51MX,Analog Devices MicroConverters)的新设备,以及支持很多公司的一流的设备和IP内核,比如Analog Devices, Atmel, Cypress Semiconductor, Dallas Semiconductor, Goal, Hynix, Infineon, Intel, NXP(founded by Philips), OKI, Silicon Labs,SMSC, STMicroeleectronics,Synopsis, TDK, Temic, Texas Instruments,Winbond等。 通过PK51专业级开发工具,可以轻松地了解8051的On-chip Peripherals与及其它关键特性。 The PK51专业级开发工具包括… l          μVision Ø         集成开发环境 Ø          调试器 Ø         软件模拟器   l          Keil 8051扩展编译工具 Ø         AX51宏汇编程序 Ø         ANSI C编译工具 Ø         LX51 连接器 Ø         OHX51 Object-HEX 转换器 l          Keil 8051编译工具 Ø         A51宏汇编程序 Ø         C51 ANSI C编译工具 Ø         BL51 代码库连接器 Ø         OHX51 Object-HEX 转换器 Ø         OC51 集合目标转换器   l          目标调试器 Ø         FlashMON51 目标监控器 Ø         MON51目标监控器 Ø         MON390 (Dallas 390)目标监控器 Ø         MONADI (Analog Devices 812)目标监控器 Ø         ISD51 在系统调试   l          RTX51微实时内核   你应该考虑PK51开发工具包,如果你… l          需要用8051系列单片机来开发 l          需要开发 Dallas 390 或者 Philips 51MX代码 l          需要用C编写代码 l          需要一个软件模拟器或是没有硬件仿真器 l          需要在单芯片上基于小实时内核创建复杂的应用

    标签: C51 V8 开发工具

    上传时间: 2013-10-30

    上传用户:yy_cn

  • LPC1850 Cortex-M3内核微控制器数据手册

    The LPC1850/30/20/10 are ARM Cortex-M3 based microcontrollers for embeddedapplications. The ARM Cortex-M3 is a next generation core that offers systemenhancements such as low power consumption, enhanced debug features, and a highlevel of support block integration.The LPC1850/30/20/10 operate at CPU frequencies of up to 150 MHz. The ARMCortex-M3 CPU incorporates a 3-stage pipeline and uses a Harvard architecture withseparate local instruction and data buses as well as a third bus for Peripherals. The ARMCortex-M3 CPU also includes an internal prefetch unit that supports speculativebranching.The LPC1850/30/20/10 include up to 200 kB of on-chip SRAM data memory, a quad SPIFlash Interface (SPIFI), a State Configuration Timer (SCT) subsystem, two High-speedUSB controllers, Ethernet, LCD, an external memory controller, and multiple digital andanalog Peripherals.

    标签: Cortex-M 1850 LPC 内核微控制器

    上传时间: 2014-12-31

    上传用户:zhuoying119

  • LPC4300系列ARM双核微控制器产品数据手册

    The LPC4350/30/20/10 are ARM Cortex-M4 based microcontrollers for embeddedapplications. The ARM Cortex-M4 is a next generation core that offers systemenhancements such as low power consumption, enhanced debug features, and a highlevel of support block integration.The LPC4350/30/20/10 operate at CPU frequencies of up to 150 MHz. The ARMCortex-M4 CPU incorporates a 3-stage pipeline, uses a Harvard architecture withseparate local instruction and data buses as well as a third bus for Peripherals, andincludes an internal prefetch unit that supports speculative branching. The ARMCortex-M4 supports single-cycle digital signal processing and SIMD instructions. Ahardware floating-point processor is integrated in the core.The LPC4350/30/20/10 include an ARM Cortex-M0 coprocessor, up to 264 kB of datamemory, advanced configurable Peripherals such as the State Configurable Timer (SCT)and the Serial General Purpose I/O (SGPIO) interface, two High-speed USB controllers,Ethernet, LCD, an external memory controller, and multiple digital and analog Peripherals

    标签: 4300 LPC ARM 双核微控制器

    上传时间: 2013-10-28

    上传用户:15501536189

  • 怎样使用Nios II处理器来构建多处理器系统

    怎样使用Nios II处理器来构建多处理器系统 Chapter 1. Creating Multiprocessor Nios II Systems Introduction to Nios II Multiprocessor Systems . . . . . . . . . . . . . . 1–1 Benefits of Hierarchical Multiprocessor Systems  . . . . . . . . . . . . . . . 1–2 Nios II Multiprocessor Systems . . . . . . . . . . . . . . . . . . . .  . . . . . . . . . . . . . 1–2 Multiprocessor Tutorial Prerequisites   . . . . . . . . . . .  . . . . . . . . . . . . 1–3 Hardware Designs for Peripheral Sharing   . . . . . . . . . . . .. . . . . . . . 1–3 Autonomous Multiprocessors   . . . . . . . . . . . . . . . . . . . . . .  . . . . . . . 1–3 Multiprocessors that Share Peripherals . . . . . . . . . . . . . . . . . . . . . . 1–4 Sharing Peripherals in a Multiprocessor System   . . . . . . . . . . . . . . . . . 1–4 Sharing Memory  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–6 The Hardware Mutex Core  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  . . . . 1–7 Sharing Peripherals   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . 1–8 Overlapping Address Space  . . . . . . . . . . . . . . . . . . . . . . . . . . . .  . . . . 1–8 Software Design Considerations for Multiple Processors . . .. . . . . 1–9 Program Memory  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–9 Boot Addresses  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1–13 Debugging Nios II Multiprocessor Designs  . . . . . . . . . . . . . . . .  1–15 Design Example: The Dining Philosophers’ Problem   . . . . .. . . 1–15 Hardware and Software Requirements . . . . . . . . . . . . . . . .. . . 1–16 Installation Notes  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–17 Creating the Hardware System   . . . . . . . . . . . . . . .. . . . . . 1–17 Getting Started with the multiprocessor_tutorial_start Design Example   1–17 Viewing a Philosopher System   . . . . . . . . . . . . . . . . . . . . . . . . . . . .  . . 1–18 Philosopher System Pipeline Bridges  . . . . . . . . . . . . . . . . . . . . . 1–19 Adding Philosopher Subsystems   . . . . . . . . . . . . . . . . . . . . . .  . . . . 1–21 Connecting the Philosopher Subsystems  . . . . . . . . . . . . .. . . . . 1–22 Viewing the Complete System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–27 Generating and Compiling the System   . . . . . . . . . . . . . . . . . .. 1–28

    标签: Nios 处理器 多处理器

    上传时间: 2013-11-21

    上传用户:lo25643

  • SL811开发资料_包含源程序_电路图_芯片资料

    SL811开发资料_包含源程序_电路图_芯片资料:SL811HS Embedded USB Host/Slave Controller.The SL811HS is an Embedded USB Host/Slave Controller capable of communicate with either full-speed or low-speed USB Peripherals. The SL811HS can interface to devices such as microprocessors, microcontrollers, DSPs, or directly to a variety of buses such as ISA, PCMCIA, and others. The SL811HS USB Host Controller conforms to USB Specification 1.1.The SL811HS USB Host/Slave Controller incorporates USB Serial Interface functionality along with internal full-/low-speed transceivers.The SL811HS supports and operates in USB full-speed mode at 12 Mbps, or at low-speed 1.5-Mbps mode.The SL811HS data port and microprocessor interface provide an 8-bit data path I/O or DMA bidirectional, with interrupt support to allow easy interface to standard microprocessors or microcontrollers such as Motorola or Intel CPUs and many others. Internally,the SL811HS contains a 256-byte RAM data buffer which is used for control registers and data buffer.The available package types offered are a 28-pin PLCC (SL811HS) and a 48-pin TQFP package (SL811HST-AC). Both packages operate at 3.3 VDC. The I/O interface logic is 5V-tolerant.

    标签: 811 SL 开发资料 源程序

    上传时间: 2013-12-22

    上传用户:a82531317

  • This book introduces embedded systems to C and C++ programmers. Topics include testing memory device

    This book introduces embedded systems to C and C++ programmers. Topics include testing memory devices, writing and erasing Flash memory, verifying nonvolatile memory contents, controlling on-chip Peripherals, device driver design and implementation, optimizing embedded code for size and speed, and making the most of C++ without a performance penalty. Pages : 336 Slots : 1

    标签: programmers introduces embedded include

    上传时间: 2013-12-10

    上传用户:shizhanincc