VCS下编译通过的PLI的实例
VCS下编译通过的PLI的实例,包括功能仿真,和可综合代码...
VCS下编译通过的PLI的实例,包括功能仿真,和可综合代码...
Verilog HDL的PLI子程序接口,用于与用户C程序在2个方向上传输数据,可用xilinx ISE,quartusii或modelsim仿真,...
Assertion based design_and:Including:Assertion methdology,Specifyingg RTL Properties, PLI-Based Ass...
pli的文档资料,是cadence出的,详细介绍了pli的使用方法...
vcs tutorial Lab2-PLI verygood...
Analog signals are represented by 64 bit buses. They are converted to real and from real representa...