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  • ADC Oversampling Techniques fo

    Luminary Micro provides an analog-to-digital converter (ADC) module on some members of theStellaris microcontroller family. The hardware resolution of the ADC is 10 bits; however, due to noiseand other accuracy-diminishing factors, the true accuracy is less than 10 bits. This application noteprovides a software-based oversampling technique, resulting in an improved Effective Number OfBits (ENOB) in the conversion result. This document describes methods of oversampling an inputsignal, and the impact on precision and Overall system performance.

    标签: Oversampling Techniques ADC fo

    上传时间: 2013-12-17

    上传用户:zhyiroy

  • XAPP228 -Virtex器件内的四端口存储器

    This application note describes how the existing dual-port block memories in the Spartan™-IIand Virtex™ families can be used as Quad-Port memories. This essentially involves a dataaccess time (halved) versus functionality (doubled) trade-off. The Overall bandwidth of the blockmemory in terms of bits per second will remain the same.

    标签: Virtex XAPP 228 器件

    上传时间: 2013-11-08

    上传用户:lou45566

  • 多远程二极管温度传感器 (Design Considerat

    多远程二极管温度传感器-Design Considerations for pc thermal management Multiple RDTS (remote diode temperature sensing) provides the most accurate method of sensing an IC’s junction temperature. It overcomes thermal gradient and placement issues encountered when trying to place external sensors. PCB component count decreases when using a device that provides multiple inputs.Better temperature sensing improves product performance and reliability. Disk drive data integrity suffers at elevated temperatures. IBM published an article stating that a 5°C rise in operating temperature causes a 15% increase in the drive’s failure rate. The Overall performance of a system can be improved by providing a more accurate temperature measurement of the most critical devices allowing them to run just a few degrees hotter.The LM83 directly senses its own temperature and the temperature of three external PN junctions. One is dedicated to the CPU of choice, the other two go to other parts of your system that need thermal monitoring such as the disk drive or graphics chip. The SMBus-compatible LM83 supports SMBus timeout and logic levels. The LM83 has two interrupt outputs; one for user-programmable limits and WATCHDOG capability (INT), the other is a Critical Temperature Alarm output (T_CRIT_A) for system power supply shutdown.

    标签: Considerat Design 远程 二极管

    上传时间: 2014-12-21

    上传用户:ljd123456

  • 71M6541演示板用户手册

    The Maxim Integrated 71M6541-DB REV 3.0 Demo Board is a demonstration board for evaluating the 71M6541 device for single-phase electronic energy metering applications in conjunction with the Remote Sensor Inter-face. It incorporates a 71M6541 integrated circuit, a 71M6601 Remote Interface IC, peripheral circuitry such as a serial EEPROM, emulator port, and on-board power supply. A serial to USB converter allows communication to a PC through a USB port. The Demo Board allows the evaluation of the 71M6541 energy meter chip for measurement accuracy and Overall system use.

    标签: 71M6541 演示板 用户手册

    上传时间: 2013-11-06

    上传用户:雨出惊人love

  • 如何优化ISM无线电频率(RF)系统

    Abstract: With industrial/scientific/medical (ISM) band radio frequency (RF) products, often times users are new to the structure of Maxim's low pin-count transmitters andfully integrated superheterodyne receivers. This tutorial provides simple steps that can be taken to get the best performance out of these transmitters and receivers whileproviding techniques to measure the Overall capability of the design.

    标签: ISM RF 无线电频率

    上传时间: 2013-11-02

    上传用户:yph853211

  • PCB Design Considerations and Guidelines for 0.4mm and 0.5mm WLPs

    Abstract: Using a wafer-level package (WLP) can reduce the Overall size and cost of your solution.However when using a WLP IC, the printed circuit board (PCB) layout can become more complex and, ifnot carefully planned, result in an unreliable design. This article presents some PCB designconsiderations and general recommendations for choosing a 0.4mm- or 0.5mm-pitch WLP for yourapplication.

    标签: Considerations Guidelines and Design

    上传时间: 2013-11-09

    上传用户:ls530720646

  • XAPP228 -Virtex器件内的四端口存储器

    This application note describes how the existing dual-port block memories in the Spartan™-IIand Virtex™ families can be used as Quad-Port memories. This essentially involves a dataaccess time (halved) versus functionality (doubled) trade-off. The Overall bandwidth of the blockmemory in terms of bits per second will remain the same.

    标签: Virtex XAPP 228 器件

    上传时间: 2014-01-24

    上传用户:15527161163

  • VHDL 关于2DFFT设计程序 u scinode1 ∼ scinode9.vhd: Every SCI node RTL vhdl code. The details can be

    VHDL 关于2DFFT设计程序 u scinode1 ∼ scinode9.vhd: Every SCI node RTL vhdl code. The details can be seen in the following section. u 2dfft.vhd: The top module includes these scinodes and form a 3x3 SCI Torus network, and it support these sub-modules scinode1∼ scinode9 reset and clk and global_cnt signals to synchronous the sub-modules to simplify the Overall design. u proj2.wfc: VSS simulation result that is the same as the ModelSim simulation result. u Pro2_2.wfc: VSS simulation result of another test pattern can’t cause overflow situation.

    标签: scinode1 scinode details 2DFFT

    上传时间: 2014-12-02

    上传用户:15071087253

  • Often it is necessary to add some logical control to a MATLAB algorithm to allow the generated hardw

    Often it is necessary to add some logical control to a MATLAB algorithm to allow the generated hardware to function correctly in the Overall system. This lab exercise will explore how hardware control can be added to a MATLAB algorithm and synthesized using AccelDSP Synthesis.

    标签: algorithm generated necessary to

    上传时间: 2014-01-25

    上传用户:yimoney

  • This Document provides the High Level Design specification for the Bootloader development and librar

    This Document provides the High Level Design specification for the Bootloader development and library porting for ADSP-BF533 based EZ-Kit Lite Board and STAMP Board. This document is meant to be the one of the inputs for the System Test Plan and the Overall implementation of the same. This document also details the approach and assumptions made for the design

    标签: specification development Bootloader the

    上传时间: 2015-10-14

    上传用户:D&L37