The PCA9516 is a BiCMOS integrated circuit intended forapplication in I2C and SMBus systems.While retaining all the operating modes and features of the I2Csystem, it permits extension of the I2C-bus by buffering both the data(SDA) and the clock (SCL) lines, thus enabling five buses of 400 pF.The I2C-bus capacitance limit of 400 pF restricts the number ofdevices and bus length. Using the PCA9516 enables the systemdesigner to divide the bus into five segments off of a hub where anysegment to segment transition sees only one repeater delay.
上传时间： 2013-11-21
上传用户：q123321
<Almost since the introduction of microcontrollers as electronic components there always has been an oscillatorcircuit on the device to make it work. From application point of view only some external components wererequired to make it work. However, to make sure that it will always work required more effort. This report is basedon feedback from the market from customers applying 8-bit mircrocontrollers.>
标签： oscillators X-tal bit mic
上传时间： 2013-11-12
上传用户：穿着衣服的大卫
The PCA9540B is a 1-of-2 bidirectional translating multiplexer, controlled via the I2C-bus.The SCL/SDA upstream pair fans out to two SCx/SDx downstream pairs, or channels.Only one SCx/SDx channel is selected at a time, determined by the contents of theprogrammable control register.
上传时间： 2014-12-28
上传用户：nshark
The PCA9542A is a 1-of-2 bidirectional translating multiplexer, controlled via the I2C-bus.The SCL/SDA upstream pair fans out to two SCx/SDx downstream pairs, or channels.Only one SCx/SDx channel is selected at a time, determined by the contents of theprogrammable control register. Two interrupt inputs, INT0 and INT1, one for each of theSCx/SDx downstream pairs, are provided. One interrupt output, INT, which acts as anAND of the two interrupt inputs, is provided.
上传时间： 2013-12-07
上传用户：europa_lin
CAN与RS232转换节点的设计与实现 介绍将CAN总线接口与RS232总线接口相互转换的设计方法和2种总线电平转换关系，实现CAN总线与各模块的接口设计，制定了相应的软硬件设计方案，并给出软件设计流程图以及部分硬件设计原理图。为CAN总线与RS232总线互联提供了一种方法，对CAN总线与RS232总线接口设备的互联和广泛应用的实现具有重要意义。关键词：CAN总线；RS-232总线；串行通信Design and Realization of CAN and RS232 Transformation NodeZHOU Wei, CHENG Xiao-hong(Information Institute, Wuhan University of Technology, Wuhan 430070)【Abstract】This paper introduces one design method of the CAN bus interface and the RS232 bus interface interconversion, emphasizes two kindof bus level transformation relations, realizes the CAN bus and various modules connection design, formulates the design proposal of correspondingsoftware and hardware, and gives the flow chart of software design as well as the partial schematic diagram of hardware design. It providesonemethod for the CAN bus and the RS232 bus interconnection, has the vital significance to widespread application realization of the CAN busand theRS232 bus interface equipment interconnection.【Key words】CAN bus; RS-232 bus; serial communication
上传时间： 2013-11-04
上传用户：leesuper
当拿到一张CASE单时，首先得确定的是能用什么母体才能实现此功能，然后才能展开对外围硬件电路的设计，因此首先得了解每个母体的基本功能及特点，下面大至的介绍一下本公司常用的IC：单芯片解决方案• SN8P1900 系列– 高精度 16-Bit 模数转换器– 可编程运算放大器 (PGIA)• 信号放大低漂移: 2V• 放大倍数可编程: 1/16/64/128 倍– 升压- 稳压调节器 (Charge-Pump Regulator)• 电源输入: 2.4V ~ 5V• 稳压输出: e.g. 3.8V at SN8P1909– 内置液晶驱动电路 (LCD Driver)– 单芯片解决方案 • 耳温枪 SN8P1909 LQFP 80 Pins• 5000 解析度量测器 SN8P1908 LQFP 64 Pins• 体重计 SN8P1907 SSOP 48 Pins单芯片解决方案• SN8P1820 系列– 精确的12-Bit 模数转换器– 可编程运算放大器 (PGIA)• Gain Stage One: Low Offset 5V, Gain: 16/32/64/128• Gain Stage One: Low Offset 2mV, Gain: 1.3 ~ 2.5– 升压- 稳压调节器• 电源输入: 2.4V ~ 5V• 稳压输出: e.g. 3.8V at SN8P1829– 内置可编程运算放大电路– 内置液晶驱动电路 – 单芯片解决方案 • 电子医疗器 SN8P1829 LQFP 80 Pins 高速/低功耗/高可靠性微控制器• 最新SN8P2000 系列– SN8P2500/2600/2700 系列– 高度抗交流杂讯能力• 标准瞬间电压脉冲群测试 (EFT): IEC 1000-4-4• 杂讯直接灌入芯片电源输入端• 只需添加1颗 2.2F/50V 旁路电容• 测试指标稳超 4000V (欧规)– 高可靠性复位电路保证系统正常运行• 支持外部复位和内部上电复位• 内置1.8V 低电压侦测可靠复位电路• 内置看门狗计时器保证程序跳飞可靠复位– 高抗静电/栓锁效应能力– 芯片工作温度有所提高: -200C ~ 700C 工规芯片温度： -400C ~ 850C 高速/低功耗/高可靠性微控制器• 最新 SN8P2000 系列– SN8P2500/2600/2700 系列– 1T 精简指令级结构• 1T: 一个外部振荡周期执行一条指令• 工作速度可达16 MIPS / 16 MHz Crystal– 工作消耗电流 < 2mA at 1-MIPS/5V– 睡眠模式下消耗电流 < 1A / 5V额外功能• 高速脉宽调制输出 (PWM)– 8-Bit PWM up to 23 KHz at 12 MHz System Clock– 6-Bit PWM up to 93 KHz at 12 MHz System Clock– 4-Bit PWM up to 375 KHz at 12 MHz System Clock• 内置高速16 MHz RC振荡器 (SN8P2501A)• 电压变化唤醒功能• 可编程控制沿触发/中断功能– 上升沿 / 下降沿 / 双沿触发• 串行编程接口
上传时间： 2013-10-21
上传用户：jiahao131
//芯片资料请到www.elecfans.com查找 //DS1820 C51 子程序//这里以11.0592M晶体为例，不同的晶体速度可能需要调整延时的时间//sbit DQ =P2^1;//根据实际情况定义端口 typedef unsigned char byte;typedef unsigned int word; //延时void delay(word useconds){ for(;useconds>0;useconds--);} //复位byte ow_reset(void){ byte presence; DQ = 0; //pull DQ line low delay(29); // leave it low for 480us DQ = 1; // allow line to return high delay(3); // wait for presence presence = DQ; // get presence signal delay(25); // wait for end of timeslot return(presence); // presence signal returned} // 0=presence, 1 = no part //从 1-wire 总线上读取一个字节byte read_byte(void){ byte i; byte value = 0; for (i=8;i>0;i--) { value>>=1; DQ = 0; // pull DQ low to start timeslot DQ = 1; // then return high delay(1); //for (i=0; i<3; i++); if(DQ)value|=0x80; delay(6); // wait for rest of timeslot } return(value);} //向 1-WIRE 总线上写一个字节void write_byte(char val){ byte i; for (i=8; i>0; i--) // writes byte, one bit at a time { DQ = 0; // pull DQ low to start timeslot DQ = val&0x01; delay(5); // hold value for remainder of timeslot DQ = 1; val=val/2; } delay(5);} //读取温度char Read_Temperature(void){ union{ byte c[2]; int x; }temp; ow_reset(); write_byte(0xCC); // Skip ROM write_byte(0xBE); // Read Scratch Pad temp.c[1]=read_byte(); temp.c[0]=read_byte(); ow_reset(); write_byte(0xCC); //Skip ROM write_byte(0x44); // Start Conversion return temp.x/2;}
上传时间： 2013-11-03
上传用户：hongmo
用单片机配置FPGA—PLD设计技巧 Configuration/Program Method for Altera Device Configure the FLEX Device You can use any Micro-Controller to configure the FLEX device–the main idea is clocking in ONE BITof configuration data per CLOCK–start from the BIT 0The total Configuration time–e.g. 10K10 need 15K byte configuration file•calculation equation–10K10* 1.5= 15Kbyte–configuration time for the file itself•15*1024*8*clock = 122,880Clock•assume the CLOCK is 4MHz•122,880*1/4Mhz=30.72msec
上传时间： 2013-10-09
上传用户：a67818601
Design techniques for electronic systems areconstantly changing. In industries at the heart of thedigital revolution, this change is especially acute.Functional integration, dramatic increases incomplexity, new standards and protocols, costconstraints, and increased time-to-market pressureshave bolstered both the design challenges and theopportunities to develop modern electronic systems.One trend driving these changes is the increasedintegration of core logic with previously discretefunctions to achieve higher performance and morecompact board designs.
上传时间： 2014-12-28
上传用户：康郎
The exacting technological demands created byincreasing bandwidth requirements have given riseto significant advances in FPGA technology thatenable engineers to successfully incorporate highspeedI/O interfaces in their designs. One aspect ofdesign that plays an increasingly important role isthat of the FPGA package. As the interfaces get fasterand wider, choosing the right package has becomeone of the key considerations for the systemdesigner.
上传时间： 2013-10-22
上传用户：1234xhb
